From patchwork Thu Oct 19 12:48:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 10016645 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 36F3B60224 for ; Thu, 19 Oct 2017 12:51:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1818C28D26 for ; Thu, 19 Oct 2017 12:51:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0CE0C28D43; Thu, 19 Oct 2017 12:51:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B1A3928D26 for ; Thu, 19 Oct 2017 12:51:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e5AG8-0004S9-PT; Thu, 19 Oct 2017 12:49:12 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e5AG7-0004RH-Ab for xen-devel@lists.xenproject.org; Thu, 19 Oct 2017 12:49:11 +0000 Received: from [85.158.143.35] by server-11.bemta-6.messagelabs.com id 89/D9-20813-64F98E95; Thu, 19 Oct 2017 12:49:10 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrILMWRWlGSWpSXmKPExsVysyfVTddt/ot Ig/aFXBbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8a2zpCCo2IV/75wNTCuEepi5OIQEtjMKLH3 7RV2CGc5o8SVCdeYuhg5OdgEdCV23HzNDGKLCERInH58CSzOLKAksf/sNUYQW1jAXeLVidtgN ouAqsTbpTvA6nkFrCTWzTzBAmJLCMhLnHtwGyzOKWAtcXvvDbB6IaCabQ/fMU5g5F7AyLCKUa M4tagstUjX0EAvqSgzPaMkNzEzB8gz08tNLS5OTE/NSUwq1kvOz93ECPQuAxDsYDz+Pu4QoyQ Hk5Io78eqF5FCfEn5KZUZicUZ8UWlOanFhxhlODiUJHg95wHlBItS01Mr0jJzgGEGk5bg4FES 4fUGSfMWFyTmFmemQ6ROMepydNy8+4dJiCUvPy9VSpw3BqRIAKQoozQPbgQs5C8xykoJ8zICH SXEU5BalJtZgir/ilGcg1FJmFcDZApPZl4J3KZXQEcwAR3Bbg92REkiQkqqgbHK6lbXUz7pXo s1328ctn3Iafj21IzzeRUnrilf+f1a3z7OVmPL+yPPjasFPJb7bFKfs2XPgwvaQY472ra3zFi kcvux5ybXH5M5m9a9sr2h0jGXhWM2c1v1Bj8+iRne84qeOSqfecWY0pPkf/z7BV6p1SyV5g02 F036DF4qZFk15jb8uMAZ2qvEUpyRaKjFXFScCABfO+vtdAIAAA== X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-7.tower-21.messagelabs.com!1508417349!77996744!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests=SUBJECT_RANDOMQ X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 61509 invoked from network); 19 Oct 2017 12:49:10 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-7.tower-21.messagelabs.com with SMTP; 19 Oct 2017 12:49:10 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 74A0F1596; Thu, 19 Oct 2017 05:49:09 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 88D1A3F3E1; Thu, 19 Oct 2017 05:49:08 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Thu, 19 Oct 2017 13:48:41 +0100 Message-Id: <20171019124847.5978-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171019124847.5978-1-andre.przywara@arm.com> References: <20171019124847.5978-1-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [PATCH 06/12] ARM: VGIC: streamline gic_restore_pending_irqs() X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP In gic_restore_pending_irqs() we push our pending virtual IRQs into the list registers. This function is called once from a GIC context and once from a VGIC context. Refactor the calls so that we have only one callsite from the VGIC context. This will help separating the two worlds later. Signed-off-by: Andre Przywara --- xen/arch/arm/domain.c | 1 + xen/arch/arm/gic.c | 11 +++++------ xen/arch/arm/traps.c | 2 +- xen/include/asm-arm/gic.h | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index a74ff1c07c..73f4d4b2b2 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -185,6 +185,7 @@ static void ctxt_switch_to(struct vcpu *n) /* VGIC */ gic_restore_state(n); + gic_inject(n); /* VFP */ vfp_restore_state(n); diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 59dd255c2c..58d69955fb 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -36,8 +36,6 @@ #include #include -static void gic_restore_pending_irqs(struct vcpu *v); - static DEFINE_PER_CPU(uint64_t, lr_mask); #define lr_all_full() (this_cpu(lr_mask) == ((1 << gic_hw_ops->info->nr_lrs) - 1)) @@ -91,8 +89,6 @@ void gic_restore_state(struct vcpu *v) gic_hw_ops->restore_state(v); isb(); - - gic_restore_pending_irqs(v); } /* desc->irq needs to be disabled before calling this function */ @@ -697,11 +693,14 @@ out: return rc; } -void gic_inject(void) +void gic_inject(struct vcpu *v) { ASSERT(!local_irq_is_enabled()); - gic_restore_pending_irqs(current); + gic_restore_pending_irqs(v); + + if ( v != current ) + return; if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) gic_hw_ops->update_hcr_status(GICH_HCR_UIE, true); diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index ff3d6ff2aa..7fd676ed9d 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2298,7 +2298,7 @@ void leave_hypervisor_tail(void) { local_irq_disable(); if (!softirq_pending(smp_processor_id())) { - gic_inject(); + gic_inject(current); /* * If the SErrors handle option is "DIVERSE", we have to prevent diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 4b2a60ee64..fe14094c0f 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -235,7 +235,7 @@ extern int gic_route_irq_to_guest(struct domain *, unsigned int virq, int gic_remove_irq_from_guest(struct domain *d, unsigned int virq, struct irq_desc *desc); -extern void gic_inject(void); +extern void gic_inject(struct vcpu *v); extern int gic_events_need_delivery(void); extern void init_maintenance_interrupt(void);