From patchwork Wed May 8 22:47:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Stabellini X-Patchwork-Id: 10936559 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 01D7E112C for ; Wed, 8 May 2019 22:48:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E685828A21 for ; Wed, 8 May 2019 22:48:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DAD2028A2A; Wed, 8 May 2019 22:48:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5069728A21 for ; Wed, 8 May 2019 22:48:58 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hOVLZ-0005dw-IB; Wed, 08 May 2019 22:47:33 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hOVLX-0005d8-Sz for xen-devel@lists.xenproject.org; Wed, 08 May 2019 22:47:31 +0000 X-Inumbo-ID: 42f5e222-71e3-11e9-ac19-5beb5252e5b0 Received: from mail.kernel.org (unknown [198.145.29.99]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 42f5e222-71e3-11e9-ac19-5beb5252e5b0; Wed, 08 May 2019 22:47:31 +0000 (UTC) Received: from sstabellini-ThinkPad-T480s.xilinx.com (c-67-164-102-47.hsd1.ca.comcast.net [67.164.102.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DDBB32173E; Wed, 8 May 2019 22:47:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1557355650; bh=iBQFuyk2ANlWeX08tzlXt00YPbSG8rP6JeadB7axNJQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jXk1DqaeXwHaclmvOmy8x0gpf3bMPRz4XKWpEkym59gjbOeKkQg6Xo+ZhZCF2ne+E l8sMveGXkUvqVEG2xY94o8/JQhZ13a9JBdqHf93zhJsK3XGt/JcMOhtK0hB2UicXwK 2+UAkJZPBJ4k2rYhKvk8Mv7hNdJ6wMgr01afQe7M= From: Stefano Stabellini To: julien.grall@arm.com Date: Wed, 8 May 2019 15:47:27 -0700 Message-Id: <20190508224727.11549-3-sstabellini@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Subject: [Xen-devel] [PATCH v2 3/3] xen/arm: fix mask calculation in pdx_init_mask X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , sstabellini@kernel.org, wei.liu2@citrix.com, konrad.wilk@oracle.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com, tim@xen.org, JBeulich@suse.com, xen-devel@lists.xenproject.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The mask calculation in pdx_init_mask is wrong when the first bank starts at address 0x0. The reason is that pdx_init_mask will do '0 - 1' causing an underflow. As a result, the mask becomes 0xffffffffffffffff which is the biggest possible mask and ends up causing a significant memory waste in the frametable size computation. For instance, on platforms that have a low memory bank starting at 0x0 and a high memory bank, the frametable will end up covering all the holes in between. The purpose of the mask is to be passed as a parameter to pfn_pdx_hole_setup, which based on the mask parameter calculates pfn_pdx_hole_shift, pfn_pdx_bottom_mask, etc. which are actually the important masks for frametable initialization later on. pfn_pdx_hole_setup never compresses addresses below MAX_ORDER bits (1GB on ARM). Thus, it is safe to initialize mask passing 1ULL << (MAX_ORDER + PAGE_SHIFT) as start address to pdx_init_mask. Signed-off-by: Stefano Stabellini CC: JBeulich@suse.com CC: andrew.cooper3@citrix.com CC: George.Dunlap@eu.citrix.com CC: ian.jackson@eu.citrix.com CC: konrad.wilk@oracle.com CC: tim@xen.org CC: wei.liu2@citrix.com --- Changes in v2: - update commit message - add in-code comments regarding update sites - improve in-code comments - move the mask initialization changes to pdx_init_mask --- xen/arch/arm/setup.c | 9 ++++++++- xen/common/pdx.c | 8 +++++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index ccb0f181ea..afaafe7b84 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -482,7 +482,14 @@ static void __init init_pdx(void) { paddr_t bank_start, bank_size, bank_end; - u64 mask = pdx_init_mask(bootinfo.mem.bank[0].start); + /* + * Pass 0x0 to pdx_init_mask to get a mask initialized with the + * first to 1<