diff mbox series

[for-4.13] xen/arm: p2m: Fix typo in the comment on top of P2M_ROOT_LEVEL

Message ID 20190929163510.15688-1-julien.grall@arm.com (mailing list archive)
State New, archived
Headers show
Series [for-4.13] xen/arm: p2m: Fix typo in the comment on top of P2M_ROOT_LEVEL | expand

Commit Message

Julien Grall Sept. 29, 2019, 4:35 p.m. UTC
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/p2m.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jürgen Groß Sept. 30, 2019, 6:04 a.m. UTC | #1
On 29.09.19 18:35, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>

Release-acked-by: Juergen Gross <jgross@suse.com>


Juergen
Stefano Stabellini Oct. 1, 2019, 1:01 a.m. UTC | #2
On Sun, 29 Sep 2019, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>

Acked-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
>  xen/arch/arm/p2m.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
> index 5ff6ce15f6..4a429dc1be 100644
> --- a/xen/arch/arm/p2m.c
> +++ b/xen/arch/arm/p2m.c
> @@ -25,7 +25,7 @@ static unsigned int __read_mostly max_vmid = MAX_VMID_8_BIT;
>  /* VMID is by default 8 bit width on AArch64 */
>  #define MAX_VMID       max_vmid
>  #else
> -/* First level P2M is alway 2 consecutive pages */
> +/* First level P2M is always 2 consecutive pages */
>  #define P2M_ROOT_LEVEL 1
>  #define P2M_ROOT_ORDER    1
>  /* VMID is always 8 bit width on AArch32 */
> -- 
> 2.11.0
>
diff mbox series

Patch

diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 5ff6ce15f6..4a429dc1be 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -25,7 +25,7 @@  static unsigned int __read_mostly max_vmid = MAX_VMID_8_BIT;
 /* VMID is by default 8 bit width on AArch64 */
 #define MAX_VMID       max_vmid
 #else
-/* First level P2M is alway 2 consecutive pages */
+/* First level P2M is always 2 consecutive pages */
 #define P2M_ROOT_LEVEL 1
 #define P2M_ROOT_ORDER    1
 /* VMID is always 8 bit width on AArch32 */