diff mbox series

[v5,04/12] x86: make paddr_bits available earlier

Message ID 20200129202034.15052-5-liuwe@microsoft.com (mailing list archive)
State Superseded
Headers show
Series More Hyper-V infrastructures | expand

Commit Message

Wei Liu Jan. 29, 2020, 8:20 p.m. UTC
Move early_cpu_init before init_e820, such that paddr_bits can be used
by e820 code.

This will reduce code repetition and prepare for further adjustment when
L0 hypervisor comes into play.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
---
 xen/arch/x86/e820.c  | 14 ++++----------
 xen/arch/x86/setup.c |  5 +++--
 2 files changed, 7 insertions(+), 12 deletions(-)

Comments

Roger Pau Monné Jan. 30, 2020, 10:17 a.m. UTC | #1
On Wed, Jan 29, 2020 at 08:20:26PM +0000, Wei Liu wrote:
> Move early_cpu_init before init_e820, such that paddr_bits can be used
> by e820 code.
> 
> This will reduce code repetition and prepare for further adjustment when
> L0 hypervisor comes into play.
> 
> Signed-off-by: Wei Liu <liuwe@microsoft.com>

Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>

One typo below.

> ---
>  xen/arch/x86/e820.c  | 14 ++++----------
>  xen/arch/x86/setup.c |  5 +++--
>  2 files changed, 7 insertions(+), 12 deletions(-)
> 
> diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
> index 082f9928a1..3892c9cfb7 100644
> --- a/xen/arch/x86/e820.c
> +++ b/xen/arch/x86/e820.c
> @@ -420,7 +420,7 @@ static uint64_t __init mtrr_top_of_ram(void)
>  {
>      uint32_t eax, ebx, ecx, edx;
>      uint64_t mtrr_cap, mtrr_def, addr_mask, base, mask, top;
> -    unsigned int i, phys_bits = 36;
> +    unsigned int i;
>  
>      /* By default we check only Intel systems. */
>      if ( e820_mtrr_clip == -1 )
> @@ -445,15 +445,9 @@ static uint64_t __init mtrr_top_of_ram(void)
>      if ( !test_bit(X86_FEATURE_MTRR & 31, &edx) )
>           return 0;
>  
> -    /* Find the physical address size for this CPU. */
> -    eax = cpuid_eax(0x80000000);
> -    if ( (eax >> 16) == 0x8000 && eax >= 0x80000008 )
> -    {
> -        phys_bits = (uint8_t)cpuid_eax(0x80000008);
> -        if ( phys_bits > PADDR_BITS )
> -            phys_bits = PADDR_BITS;
> -    }
> -    addr_mask = ((1ull << phys_bits) - 1) & ~((1ull << 12) - 1);
> +    /* paddr_bits must have been set at this point */
> +    ASSERT(paddr_bits);
> +    addr_mask = ((1ull << paddr_bits) - 1) & PAGE_MASK;
>  
>      rdmsrl(MSR_MTRRcap, mtrr_cap);
>      rdmsrl(MSR_MTRRdefType, mtrr_def);
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index d858883404..89fe49149f 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -954,6 +954,9 @@ void __init noreturn __start_xen(unsigned long mbi_p)
>      else
>          panic("Bootloader provided no memory information\n");
>  
> +    /* This must come before e820 code becuause it sets paddr_bits. */
                                          ^ because

Thanks, Roger.
Wei Liu Jan. 30, 2020, noon UTC | #2
On Thu, Jan 30, 2020 at 11:17:33AM +0100, Roger Pau Monné wrote:
> >  
> > +    /* This must come before e820 code becuause it sets paddr_bits. */
>                                           ^ because

Fixed. Thanks.

Wei.

> 
> Thanks, Roger.
Jan Beulich Jan. 31, 2020, 1:57 p.m. UTC | #3
On 30.01.2020 13:00, Wei Liu wrote:
> On Thu, Jan 30, 2020 at 11:17:33AM +0100, Roger Pau Monné wrote:
>>>  
>>> +    /* This must come before e820 code becuause it sets paddr_bits. */
>>                                           ^ because
> 
> Fixed. Thanks.

And then
Acked-by: Jan Beulich <jbeulich@suse.com>

Jan
diff mbox series

Patch

diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index 082f9928a1..3892c9cfb7 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -420,7 +420,7 @@  static uint64_t __init mtrr_top_of_ram(void)
 {
     uint32_t eax, ebx, ecx, edx;
     uint64_t mtrr_cap, mtrr_def, addr_mask, base, mask, top;
-    unsigned int i, phys_bits = 36;
+    unsigned int i;
 
     /* By default we check only Intel systems. */
     if ( e820_mtrr_clip == -1 )
@@ -445,15 +445,9 @@  static uint64_t __init mtrr_top_of_ram(void)
     if ( !test_bit(X86_FEATURE_MTRR & 31, &edx) )
          return 0;
 
-    /* Find the physical address size for this CPU. */
-    eax = cpuid_eax(0x80000000);
-    if ( (eax >> 16) == 0x8000 && eax >= 0x80000008 )
-    {
-        phys_bits = (uint8_t)cpuid_eax(0x80000008);
-        if ( phys_bits > PADDR_BITS )
-            phys_bits = PADDR_BITS;
-    }
-    addr_mask = ((1ull << phys_bits) - 1) & ~((1ull << 12) - 1);
+    /* paddr_bits must have been set at this point */
+    ASSERT(paddr_bits);
+    addr_mask = ((1ull << paddr_bits) - 1) & PAGE_MASK;
 
     rdmsrl(MSR_MTRRcap, mtrr_cap);
     rdmsrl(MSR_MTRRdefType, mtrr_def);
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d858883404..89fe49149f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -954,6 +954,9 @@  void __init noreturn __start_xen(unsigned long mbi_p)
     else
         panic("Bootloader provided no memory information\n");
 
+    /* This must come before e820 code becuause it sets paddr_bits. */
+    early_cpu_init();
+
     /* Sanitise the raw E820 map to produce a final clean version. */
     max_page = raw_max_page = init_e820(memmap_type, &e820_raw);
 
@@ -1532,8 +1535,6 @@  void __init noreturn __start_xen(unsigned long mbi_p)
     softirq_init();
     tasklet_subsys_init();
 
-    early_cpu_init();
-
     paging_init();
 
     tboot_probe();