From patchwork Mon Mar 23 10:17:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 11452611 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74240159A for ; Mon, 23 Mar 2020 10:19:10 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F92220409 for ; Mon, 23 Mar 2020 10:19:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="JTve5bus" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4F92220409 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1jGK9Y-0007bj-Cb; Mon, 23 Mar 2020 10:17:52 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1jGK9X-0007bM-Ck for xen-devel@lists.xenproject.org; Mon, 23 Mar 2020 10:17:51 +0000 X-Inumbo-ID: 8734dcb0-6cef-11ea-bec1-bc764e2007e4 Received: from esa4.hc3370-68.iphmx.com (unknown [216.71.155.144]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 8734dcb0-6cef-11ea-bec1-bc764e2007e4; Mon, 23 Mar 2020 10:17:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1584958661; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YuwDMutCdhXNnj6m3wY7ONDkRuL1FQr6n5Vuwb42REI=; b=JTve5bus+HdOGgmWQ+te7ll5hLlq+Jmdl8DjJWpqY5TMsV1CTEBIGdVs utQZetnvximtbZ5JS6YDxrEI7tIp/VDVmX+KoIMrMbkMKjldt/kbeBufz sp5M1u35IPFOsrUk2yALOi8BykANgmdI9QoMqkywT1/LEfXg1q9AEDXRn c=; Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=andrew.cooper3@citrix.com; spf=Pass smtp.mailfrom=Andrew.Cooper3@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa4.hc3370-68.iphmx.com: no sender authenticity information available from domain of andrew.cooper3@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="andrew.cooper3@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa4.hc3370-68.iphmx.com: domain of Andrew.Cooper3@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="Andrew.Cooper3@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa4.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="Andrew.Cooper3@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: LdN1PqWwHepdNHdWfPMrGcPm7lz8T7vhmmOi8EQkQWVazvDah3hEtGu6V4Ns8oqUCYsBn3IY/9 hoaWOvoGhCe8hOzNyewjzDBUMBBXbyz+1CAwljLO3eeEohzB156EUq9VF+jbdkfM04sBpxsXb0 IV7ESCBEut4+yBAiKVAcxOTOPRj7dtAuKXRkD+ivzDWhGjDQ6EUQSA7Osxppq94MRhgPP+sFzn pAZ82cbhGuZcfTOn6oY9dxEJ4sK0E+6r4Pl23SldjqEYw+9qu15/WhRUUlIxTbv15j4QAwOeaf Go4= X-SBRS: 2.7 X-MesageID: 15099737 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.72,296,1580792400"; d="scan'208";a="15099737" From: Andrew Cooper To: Xen-devel Date: Mon, 23 Mar 2020 10:17:22 +0000 Message-ID: <20200323101724.15655-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20200323101724.15655-1-andrew.cooper3@citrix.com> References: <20200323101724.15655-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 5/7] x86/ucode/intel: Clean up microcode_update_match() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Implement a new get_ext_sigtable() helper to abstract the logic for identifying whether an extended signature table exists. As part of this, rename microcode_intel.bits to data and change its type so it can be usefully used in combination with the datasize header field. Also, replace the sigmatch() macro with a static inline with a more useful API, and an explanation of why it is safe to drop one of the previous conditionals. No practical change in behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monné --- xen/arch/x86/cpu/microcode/intel.c | 75 +++++++++++++++++++++++++------------- 1 file changed, 49 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c index dfe44679be..bc3bbf139e 100644 --- a/xen/arch/x86/cpu/microcode/intel.c +++ b/xen/arch/x86/cpu/microcode/intel.c @@ -61,7 +61,7 @@ struct microcode_header_intel { struct microcode_intel { struct microcode_header_intel hdr; - unsigned int bits[0]; + uint8_t data[]; }; /* microcode format is extended from prescott processors */ @@ -98,8 +98,41 @@ static uint32_t get_totalsize(const struct microcode_header_intel *hdr) return hdr->_totalsize ?: PPRO_UCODE_DATASIZE + MC_HEADER_SIZE; } -#define sigmatch(s1, s2, p1, p2) \ - (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0)))) +/* + * A piece of microcode has an extended signature table if there is space + * between the end of data[] and the total size. (This logic also works + * appropriately for Pentium Pro/II microcode, which has 0 for both size + * fields, and no extended signature table.) + */ +static const struct extended_sigtable *get_ext_sigtable( + const struct microcode_intel *mc) +{ + if ( mc->hdr._totalsize > (MC_HEADER_SIZE + mc->hdr._datasize) ) + return (void *)&mc->data[mc->hdr._datasize]; + + return NULL; +} + +/* + * A piece of microcode is applicable for a CPU if: + * 1) the signatures (CPUID.1.EAX - Family/Model/Stepping) match, and + * 2) The Platform Flags bitmap intersect. + * + * A CPU will have a single Platform Flag bit, while the microcode may be + * common to multiple platforms and have multiple bits set. + * + * Note: The Pentium Pro/II microcode didn't use platform flags, and should + * treat 0 as a match. However, Xen being 64bit means that the cpu signature + * won't match, allowing us to simplify the logic. + */ +static bool signature_maches(const struct cpu_signature *cpu_sig, + unsigned int ucode_sig, unsigned int ucode_pf) +{ + if ( cpu_sig->sig != ucode_sig ) + return false; + + return cpu_sig->pf & ucode_pf; +} #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE) @@ -221,36 +254,26 @@ static int microcode_sanity_check(const struct microcode_intel *mc) static enum microcode_match_result microcode_update_match( const struct microcode_intel *mc) { - const struct microcode_header_intel *mc_header = &mc->hdr; - const struct extended_sigtable *ext_header; - const struct extended_signature *ext_sig; + const struct extended_sigtable *ext; unsigned int i; struct cpu_signature *cpu_sig = &this_cpu(cpu_sig); - unsigned int sig = cpu_sig->sig; - unsigned int pf = cpu_sig->pf; - unsigned int rev = cpu_sig->rev; - unsigned long data_size = get_datasize(mc_header); - const void *end = (const void *)mc_header + get_totalsize(mc_header); ASSERT(!microcode_sanity_check(mc)); - if ( sigmatch(sig, mc_header->sig, pf, mc_header->pf) ) - return (mc_header->rev > rev) ? NEW_UCODE : OLD_UCODE; - ext_header = (const void *)(mc_header + 1) + data_size; - ext_sig = (const void *)(ext_header + 1); + /* Check the main microcode signature. */ + if ( signature_maches(cpu_sig, mc->hdr.sig, mc->hdr.pf) ) + goto found; - /* - * Make sure there is enough space to hold an extended header and enough - * array elements. - */ - if ( end <= (const void *)ext_sig ) - return MIS_UCODE; - - for ( i = 0; i < ext_header->count; i++ ) - if ( sigmatch(sig, ext_sig[i].sig, pf, ext_sig[i].pf) ) - return (mc_header->rev > rev) ? NEW_UCODE : OLD_UCODE; + /* If there is an extended signature table, check each of them. */ + if ( (ext = get_ext_sigtable(mc)) != NULL ) + for ( i = 0; i < ext->count; ++i ) + if ( signature_maches(cpu_sig, ext->sigs[i].sig, ext->sigs[i].pf) ) + goto found; return MIS_UCODE; + + found: + return mc->hdr.rev > cpu_sig->rev ? NEW_UCODE : OLD_UCODE; } static bool match_cpu(const struct microcode_patch *patch) @@ -303,7 +326,7 @@ static int apply_microcode(const struct microcode_patch *patch) BUG_ON(local_irq_is_enabled()); /* write microcode via MSR 0x79 */ - wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc_intel->bits); + wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc_intel->data); wrmsrl(MSR_IA32_UCODE_REV, 0x0ULL); /* As documented in the SDM: Do a CPUID 1 here */