| Message ID | 20200601142930.29408-4-f4bug@amsat.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw: Fix some incomplete memory region size | expand |
On 6/1/20 7:29 AM, Philippe Mathieu-Daudé wrote: > memory_region_set_size() handle the 16 Exabytes limit by > special-casing the UINT64_MAX value. This is not a problem > for the 32-bit maximum, 4 GiB. > By using the UINT32_MAX value, the pci_bridge_io MemoryRegion > ends up missing 1 byte: > > (qemu) info mtree > memory-region: pci_bridge_io > 0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io > 0000000000000060-0000000000000060 (prio 0, i/o): i8042-data > 0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd > 00000000000001ce-00000000000001d1 (prio 0, i/o): vbe > 0000000000000378-000000000000037f (prio 0, i/o): parallel > 00000000000003b4-00000000000003b5 (prio 0, i/o): vga > ... > > Fix by using the correct value. We now have: > > memory-region: pci_bridge_io > 0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io > 0000000000000060-0000000000000060 (prio 0, i/o): i8042-data > 0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd > ... > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/pci/pci_bridge.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 97967d12eb..3ba3203f72 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -30,6 +30,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" #include "qemu/module.h" @@ -381,7 +382,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename) memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX); sec_bus->address_space_io = &br->address_space_io; memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", - UINT32_MAX); + 4 * GiB); br->windows = pci_bridge_region_init(br); QLIST_INIT(&sec_bus->child); QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
memory_region_set_size() handle the 16 Exabytes limit by special-casing the UINT64_MAX value. This is not a problem for the 32-bit maximum, 4 GiB. By using the UINT32_MAX value, the pci_bridge_io MemoryRegion ends up missing 1 byte: (qemu) info mtree memory-region: pci_bridge_io 0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io 0000000000000060-0000000000000060 (prio 0, i/o): i8042-data 0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd 00000000000001ce-00000000000001d1 (prio 0, i/o): vbe 0000000000000378-000000000000037f (prio 0, i/o): parallel 00000000000003b4-00000000000003b5 (prio 0, i/o): vga ... Fix by using the correct value. We now have: memory-region: pci_bridge_io 0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io 0000000000000060-0000000000000060 (prio 0, i/o): i8042-data 0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd ... Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/pci/pci_bridge.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)