diff mbox series

x86/ioapic: Improve code generation for __io_apic_{read, write}()

Message ID 20200805135418.31528-1-andrew.cooper3@citrix.com (mailing list archive)
State New, archived
Headers show
Series x86/ioapic: Improve code generation for __io_apic_{read, write}() | expand

Commit Message

Andrew Cooper Aug. 5, 2020, 1:54 p.m. UTC 
The write into REGSEL prevents the optimiser from reusing the address
calculation, forcing it to be calcualted twice.

The calculation itself is quite expensive.  Pull it out into a local varaible.

Bloat-o-meter reports:
  add/remove: 0/0 grow/shrink: 0/26 up/down: 0/-1527 (-1527)

Also correct the register type, which is uint32_t, not int.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wl@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/include/asm-x86/io_apic.h | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

Comments

Jan Beulich Aug. 5, 2020, 3:10 p.m. UTC | #1 
On 05.08.2020 15:54, Andrew Cooper wrote:
> The write into REGSEL prevents the optimiser from reusing the address
> calculation, forcing it to be calcualted twice.
> 
> The calculation itself is quite expensive.  Pull it out into a local varaible.
> 
> Bloat-o-meter reports:
>   add/remove: 0/0 grow/shrink: 0/26 up/down: 0/-1527 (-1527)
> 
> Also correct the register type, which is uint32_t, not int.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>
diff mbox series

Patch

diff --git a/xen/include/asm-x86/io_apic.h b/xen/include/asm-x86/io_apic.h
index daf17d4c3d..cb36e4ca1b 100644
--- a/xen/include/asm-x86/io_apic.h
+++ b/xen/include/asm-x86/io_apic.h
@@ -14,8 +14,8 @@ 
  */
 
 #define IO_APIC_BASE(idx)                                               \
-    ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx)           \
-                      + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
+    ((volatile uint32_t *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx)      \
+                           + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
 
 #define IO_APIC_ID(idx) (mp_ioapics[idx].mpc_apicid)
 
@@ -135,8 +135,10 @@  unsigned int io_apic_gsi_base(unsigned int apic);
 
 static inline unsigned int __io_apic_read(unsigned int apic, unsigned int reg)
 {
-    *IO_APIC_BASE(apic) = reg;
-    return *(IO_APIC_BASE(apic)+4);
+    volatile uint32_t *regs = IO_APIC_BASE(apic);
+
+    regs[0] = reg;
+    return regs[4];
 }
 
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
@@ -148,8 +150,10 @@  static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
 
 static inline void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
 {
-    *IO_APIC_BASE(apic) = reg;
-    *(IO_APIC_BASE(apic)+4) = value;
+    volatile uint32_t *regs = IO_APIC_BASE(apic);
+
+    regs[0] = reg;
+    regs[4] = value;
 }
 
 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)