diff mbox series

[v2,4/8] x86/svm: drop writes to BU_CFG on revF chips

Message ID 20200820150835.27440-5-roger.pau@citrix.com (mailing list archive)
State Superseded
Headers show
Series x86: switch default MSR behavior | expand

Commit Message

Roger Pau Monne Aug. 20, 2020, 3:08 p.m. UTC
We already have special casing to handle reads of this MSR for revF
chips, so do as the comment in svm_msr_read_intercept says and drop
writes. This is in preparation for changing the default MSR write
behavior, which will instead return #GP on not explicitly handled
writes.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Changes since v1:
 - New in this version.
---
 xen/arch/x86/hvm/svm/svm.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Jan Beulich Aug. 27, 2020, 3:42 p.m. UTC | #1
On 20.08.2020 17:08, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -2125,6 +2125,12 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content)
>          nsvm->ns_msr_hsavepa = msr_content;
>          break;
>  
> +    case MSR_F10_BU_CFG:
> +        /* See comment in svm_msr_read_intercept. */
> +        if ( boot_cpu_data.x86 != 0xf )
> +            goto gpf;
> +        break;

This isn't how I understand the code and comment there: The
dropping of writes applies to all families (and this being a
Fam10 MSR, in particular Fam10). What the code there does is
cover for the #GP that Xen received because the %rdi key
wasn't correct. There wouldn't have been a #GP on Fam10.

Newer families (didn't check yet where the boundary is) don't
support this MSR anymore as per the BKDG (looking at Fam15's
only right now). This may nevertheless still mean the CPUs
return zero on reads and discard writes; we would want to mimic
that behavior if so.

And then, whatever the final behavior here, I guess we'd want
to mirror it to the behavior for BU_CFG2, except perhaps for
the Fam0F special case.

Jan
diff mbox series

Patch

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 2d0823e7e1..7586b77268 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -2125,6 +2125,12 @@  static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content)
         nsvm->ns_msr_hsavepa = msr_content;
         break;
 
+    case MSR_F10_BU_CFG:
+        /* See comment in svm_msr_read_intercept. */
+        if ( boot_cpu_data.x86 != 0xf )
+            goto gpf;
+        break;
+
     case MSR_AMD64_TSC_RATIO:
         if ( msr_content & TSC_RATIO_RSVD_BITS )
             goto gpf;