@@ -1864,6 +1864,30 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
*msr_content = 1ULL << 61; /* MC4_MISC.Locked */
break;
+ case MSR_F10_BU_CFG:
+ if ( !rdmsr_safe(msr, *msr_content) )
+ break;
+
+ if ( boot_cpu_data.x86 == 0xf )
+ {
+ /*
+ * Win2k8 x64 reads this MSR on revF chips, where it wasn't
+ * publically available; it uses a magic constant in %rdi as a
+ * password, which we don't have in rdmsr_safe(). Since we'll
+ * throw a #GP for later writes, just use a plausible value here
+ * (the reset value from rev10h chips) if the real CPU didn't
+ * provide one.
+ */
+ *msr_content = 0x10200020;
+ break;
+ }
+ goto gpf;
+
+ case MSR_F10_BU_CFG2:
+ if ( rdmsr_safe(msr, *msr_content) )
+ goto gpf;
+ break;
+
case MSR_IA32_EBC_FREQUENCY_ID:
/*
* This Intel-only register may be accessed if this HVM guest
@@ -1942,19 +1966,6 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
default:
if ( rdmsr_safe(msr, *msr_content) == 0 )
break;
-
- if ( boot_cpu_data.x86 == 0xf && msr == MSR_F10_BU_CFG )
- {
- /* Win2k8 x64 reads this MSR on revF chips, where it
- * wasn't publically available; it uses a magic constant
- * in %rdi as a password, which we don't have in
- * rdmsr_safe(). Since we'll ignore the later writes,
- * just use a plausible value here (the reset value from
- * rev10h chips) if the real CPU didn't provide one. */
- *msr_content = 0x0000000010200020ull;
- break;
- }
-
goto gpf;
}
@@ -2110,6 +2121,12 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content)
nsvm->ns_msr_hsavepa = msr_content;
break;
+ case MSR_F10_BU_CFG:
+ case MSR_F10_BU_CFG2:
+ if ( rdmsr_safe(msr, msr_content) )
+ goto gpf;
+ break;
+
case MSR_AMD64_TSC_RATIO:
if ( msr_content & TSC_RATIO_RSVD_BITS )
goto gpf;
Move the special handling of reads to it's own switch case, and also add support for BU_CFG2. On the write side ignore writes if the MSR is readable, otherwise return a #GP. This is in preparation for changing the default MSR read/write behavior, which will instead return #GP on not explicitly handled cases. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> --- Changes since v3: - Adjust comment to match code. - Remove leading zeros from MSR value. Changes since v2: - Move the handling of reads to it's own case. - Drop writes if the MSR is readable, else return a #GP. Changes since v1: - New in this version. --- xen/arch/x86/hvm/svm/svm.c | 43 ++++++++++++++++++++++++++------------ 1 file changed, 30 insertions(+), 13 deletions(-)