| Message ID | 20201116152301.24558-3-jgross@suse.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86/xen: do some paravirt cleanup | expand |
On Mon, Nov 16, 2020 at 7:23 AM Juergen Gross <jgross@suse.com> wrote: > > Xen PV guests don't use IST. For double fault interrupts switch to > the same model as NMI. > > Signed-off-by: Juergen Gross <jgross@suse.com> > --- > arch/x86/include/asm/idtentry.h | 3 +++ > arch/x86/xen/enlighten_pv.c | 8 +++++++- > arch/x86/xen/xen-asm.S | 2 +- > 3 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h > index 3505c0396fa5..b35825392547 100644 > --- a/arch/x86/include/asm/idtentry.h > +++ b/arch/x86/include/asm/idtentry.h > @@ -611,6 +611,9 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug); > > /* #DF */ > DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault); > +#ifdef CONFIG_XEN_PV > +DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_DF, xenpv_exc_double_fault); > +#endif > > /* #VC */ > #ifdef CONFIG_AMD_MEM_ENCRYPT > diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c > index 9f5e44c1f70a..803fbcb398c4 100644 > --- a/arch/x86/xen/enlighten_pv.c > +++ b/arch/x86/xen/enlighten_pv.c > @@ -571,6 +571,12 @@ DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) > exc_nmi(regs); > } > > +DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) > +{ > + /* On Xen PV, DF doesn't use IST. The C part is the sane as native. */ I would like to think that code is sane, but you probably meant "same". > + exc_double_fault(regs, error_code); > +}
On 16.11.20 17:12, Andy Lutomirski wrote: > On Mon, Nov 16, 2020 at 7:23 AM Juergen Gross <jgross@suse.com> wrote: >> >> Xen PV guests don't use IST. For double fault interrupts switch to >> the same model as NMI. >> >> Signed-off-by: Juergen Gross <jgross@suse.com> >> --- >> arch/x86/include/asm/idtentry.h | 3 +++ >> arch/x86/xen/enlighten_pv.c | 8 +++++++- >> arch/x86/xen/xen-asm.S | 2 +- >> 3 files changed, 11 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h >> index 3505c0396fa5..b35825392547 100644 >> --- a/arch/x86/include/asm/idtentry.h >> +++ b/arch/x86/include/asm/idtentry.h >> @@ -611,6 +611,9 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug); >> >> /* #DF */ >> DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault); >> +#ifdef CONFIG_XEN_PV >> +DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_DF, xenpv_exc_double_fault); >> +#endif >> >> /* #VC */ >> #ifdef CONFIG_AMD_MEM_ENCRYPT >> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c >> index 9f5e44c1f70a..803fbcb398c4 100644 >> --- a/arch/x86/xen/enlighten_pv.c >> +++ b/arch/x86/xen/enlighten_pv.c >> @@ -571,6 +571,12 @@ DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) >> exc_nmi(regs); >> } >> >> +DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) >> +{ >> + /* On Xen PV, DF doesn't use IST. The C part is the sane as native. */ > > I would like to think that code is sane, but you probably meant "same". Oh, this is the result of copy and paste. Now we have two sane functions. :-) Juergen
diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h index 3505c0396fa5..b35825392547 100644 --- a/arch/x86/include/asm/idtentry.h +++ b/arch/x86/include/asm/idtentry.h @@ -611,6 +611,9 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug); /* #DF */ DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault); +#ifdef CONFIG_XEN_PV +DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_DF, xenpv_exc_double_fault); +#endif /* #VC */ #ifdef CONFIG_AMD_MEM_ENCRYPT diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 9f5e44c1f70a..803fbcb398c4 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -571,6 +571,12 @@ DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) exc_nmi(regs); } +DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) +{ + /* On Xen PV, DF doesn't use IST. The C part is the sane as native. */ + exc_double_fault(regs, error_code); +} + DEFINE_IDTENTRY_RAW(xenpv_exc_debug) { /* @@ -615,7 +621,7 @@ struct trap_array_entry { static struct trap_array_entry trap_array[] = { TRAP_ENTRY_REDIR(exc_debug, true ), - TRAP_ENTRY(exc_double_fault, true ), + TRAP_ENTRY_REDIR(exc_double_fault, true ), #ifdef CONFIG_X86_MCE TRAP_ENTRY_REDIR(exc_machine_check, true ), #endif diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S index bc2586730a5b..1d054c915046 100644 --- a/arch/x86/xen/xen-asm.S +++ b/arch/x86/xen/xen-asm.S @@ -161,7 +161,7 @@ xen_pv_trap asm_exc_overflow xen_pv_trap asm_exc_bounds xen_pv_trap asm_exc_invalid_op xen_pv_trap asm_exc_device_not_available -xen_pv_trap asm_exc_double_fault +xen_pv_trap asm_xenpv_exc_double_fault xen_pv_trap asm_exc_coproc_segment_overrun xen_pv_trap asm_exc_invalid_tss xen_pv_trap asm_exc_segment_not_present
Xen PV guests don't use IST. For double fault interrupts switch to the same model as NMI. Signed-off-by: Juergen Gross <jgross@suse.com> --- arch/x86/include/asm/idtentry.h | 3 +++ arch/x86/xen/enlighten_pv.c | 8 +++++++- arch/x86/xen/xen-asm.S | 2 +- 3 files changed, 11 insertions(+), 2 deletions(-)