| Message ID | 20210120112644.8882-1-vladimir.murzin@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [XEN] xen/arm: Relax GIC version check | expand |
Hi Vladimir, > On 20 Jan 2021, at 11:26, Vladimir Murzin <Vladimir.Murzin@arm.com> wrote: > > Supported values are > > 0b0000 GIC CPU interface system registers not implemented. > > 0b0001 System register interface to versions 3.0 and 4.0 of the GIC > CPU interface is supported. > > 0b0011 System register interface to version 4.1 of the GIC CPU > interface is supported. > > 4.1 is still backward compatible with 4.0/3.0, moreover ARM ARM > guarantees that future versions of the GIC CPU interface retain > backwards compatible. > > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> Thanks a lot Cheers Bertrand > --- > xen/include/asm-arm/cpufeature.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h > index 13a2739a6..c6e5711b2 100644 > --- a/xen/include/asm-arm/cpufeature.h > +++ b/xen/include/asm-arm/cpufeature.h > @@ -17,7 +17,7 @@ > #define cpu_has_el3_64 (boot_cpu_feature64(el3) >= 1) > #define cpu_has_fp (boot_cpu_feature64(fp) < 8) > #define cpu_has_simd (boot_cpu_feature64(simd) < 8) > -#define cpu_has_gicv3 (boot_cpu_feature64(gic) == 1) > +#define cpu_has_gicv3 (boot_cpu_feature64(gic) >= 1) > #endif > > #define cpu_feature32(c, feat) ((c)->pfr32.feat) > -- > 2.24.0 > >
(+ Ian) Hi Vladimir, On 20/01/2021 11:26, Vladimir Murzin wrote: > Supported values are > > 0b0000 GIC CPU interface system registers not implemented. > > 0b0001 System register interface to versions 3.0 and 4.0 of the GIC > CPU interface is supported. > > 0b0011 System register interface to version 4.1 of the GIC CPU > interface is supported. > > 4.1 is still backward compatible with 4.0/3.0, moreover ARM ARM > guarantees that future versions of the GIC CPU interface retain > backwards compatible. > > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Acked-by: Julien Grall <jgrall@amazon.com> @Ian: I would like your put as the RM for 4.15. Technically, it could be consider as a new "feature" because Xen would fail to boot on such HW. However, I think the change is small enough and doesn't introduce risk on existing supported HW. Therefore, I would like to merge it for 4.15. @Ian does it sounds good to you? > --- > xen/include/asm-arm/cpufeature.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h > index 13a2739a6..c6e5711b2 100644 > --- a/xen/include/asm-arm/cpufeature.h > +++ b/xen/include/asm-arm/cpufeature.h > @@ -17,7 +17,7 @@ > #define cpu_has_el3_64 (boot_cpu_feature64(el3) >= 1) > #define cpu_has_fp (boot_cpu_feature64(fp) < 8) > #define cpu_has_simd (boot_cpu_feature64(simd) < 8) > -#define cpu_has_gicv3 (boot_cpu_feature64(gic) == 1) > +#define cpu_has_gicv3 (boot_cpu_feature64(gic) >= 1) > #endif > > #define cpu_feature32(c, feat) ((c)->pfr32.feat) >
Julien Grall writes ("Re: [XEN PATCH] xen/arm: Relax GIC version check"):
> On 20/01/2021 11:26, Vladimir Murzin wrote:
> > Supported values are
> >
> > 0b0000 GIC CPU interface system registers not implemented.
> >
> > 0b0001 System register interface to versions 3.0 and 4.0 of the GIC
> > CPU interface is supported.
> >
> > 0b0011 System register interface to version 4.1 of the GIC CPU
> > interface is supported.
> >
> > 4.1 is still backward compatible with 4.0/3.0, moreover ARM ARM
> > guarantees that future versions of the GIC CPU interface retain
> > backwards compatible.
> >
> > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
> Acked-by: Julien Grall <jgrall@amazon.com>
>
> @Ian: I would like your put as the RM for 4.15.
>
> Technically, it could be consider as a new "feature" because Xen would
> fail to boot on such HW.
>
> However, I think the change is small enough and doesn't introduce risk
> on existing supported HW.
>
> Therefore, I would like to merge it for 4.15. @Ian does it sounds good
> to you?
Thank you for this analysis. I think it does need a freeze
exception. But your argument is convincing, so
Release-Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Hi Ian, On 20/01/2021 15:34, Ian Jackson wrote: > Julien Grall writes ("Re: [XEN PATCH] xen/arm: Relax GIC version check"): >> On 20/01/2021 11:26, Vladimir Murzin wrote: >>> Supported values are >>> >>> 0b0000 GIC CPU interface system registers not implemented. >>> >>> 0b0001 System register interface to versions 3.0 and 4.0 of the GIC >>> CPU interface is supported. >>> >>> 0b0011 System register interface to version 4.1 of the GIC CPU >>> interface is supported. >>> >>> 4.1 is still backward compatible with 4.0/3.0, moreover ARM ARM >>> guarantees that future versions of the GIC CPU interface retain >>> backwards compatible. >>> >>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> >> >> Acked-by: Julien Grall <jgrall@amazon.com> >> >> @Ian: I would like your put as the RM for 4.15. >> >> Technically, it could be consider as a new "feature" because Xen would >> fail to boot on such HW. >> >> However, I think the change is small enough and doesn't introduce risk >> on existing supported HW. >> >> Therefore, I would like to merge it for 4.15. @Ian does it sounds good >> to you? > > Thank you for this analysis. I think it does need a freeze > exception. But your argument is convincing, so > > Release-Acked-by: Ian Jackson <ian.jackson@eu.citrix.com> Thank you! I have committed the patch. Cheers,
diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 13a2739a6..c6e5711b2 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -17,7 +17,7 @@ #define cpu_has_el3_64 (boot_cpu_feature64(el3) >= 1) #define cpu_has_fp (boot_cpu_feature64(fp) < 8) #define cpu_has_simd (boot_cpu_feature64(simd) < 8) -#define cpu_has_gicv3 (boot_cpu_feature64(gic) == 1) +#define cpu_has_gicv3 (boot_cpu_feature64(gic) >= 1) #endif #define cpu_feature32(c, feat) ((c)->pfr32.feat)
Supported values are 0b0000 GIC CPU interface system registers not implemented. 0b0001 System register interface to versions 3.0 and 4.0 of the GIC CPU interface is supported. 0b0011 System register interface to version 4.1 of the GIC CPU interface is supported. 4.1 is still backward compatible with 4.0/3.0, moreover ARM ARM guarantees that future versions of the GIC CPU interface retain backwards compatible. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> --- xen/include/asm-arm/cpufeature.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)