| Message ID | 20220610083358.101412-2-michal.orzel@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | small fixes | expand |
Hi Michal, On 10/06/2022 09:33, Michal Orzel wrote: > The correct erratum ID should be 834220. > > Fixes: 0a7ba2936457 ("xen/arm: arm64: Add Cortex-A57 erratum 834220 workaround") Despite my answer in #2, this is one of the exception where I would keep the fixes tag because we should try to keep the documentation correct even in stable trees (this is more important than typo in names). > Signed-off-by: Michal Orzel <michal.orzel@arm.com> Acked-by: Julien Grall <jgrall@amazon.com> Cheers,
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 43f30747cf..e989e742fd 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1856,7 +1856,7 @@ static inline bool hpfar_is_valid(bool s1ptw, uint8_t fsc) * 1. the stage 2 fault happen during a stage 1 page table walk * (the bit ESR_EL2.S1PTW is set) * 2. the fault was due to a translation fault and the processor - * does not carry erratum #8342220 + * does not carry erratum #834220 * * Note that technically HPFAR is valid for other cases, but they * are currently not supported by Xen.
The correct erratum ID should be 834220. Fixes: 0a7ba2936457 ("xen/arm: arm64: Add Cortex-A57 erratum 834220 workaround") Signed-off-by: Michal Orzel <michal.orzel@arm.com> --- xen/arch/arm/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)