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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , Ayan Kumar Halder Subject: [XEN v2] Xen: Ensure "xenheap_bits - PAGE_SHIFT" can be used to shift "unsigned long" Date: Thu, 1 Dec 2022 18:11:45 +0000 Message-ID: <20221201181145.45279-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000B8EF:EE_|PH7PR12MB6564:EE_ X-MS-Office365-Filtering-Correlation-Id: ad91d816-865d-4166-746b-08dad3c7856a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DeWajChwOYHatO/zI7Tr3KfXVFwuZJWnLG1fChq/Ij2CUuWi93pXRyry1r8Ygm5XKSY/7pZQtbcUsDHYMVTx3viPr1yjUXsOzrmmhoI2b5+29LQO+ktINqovUZP+d6io3+zNYprbAM+yPToRlujPPs2SKF4A9MUTlF/N2UMOmoLeBWQQ+5QyZ2hcJ80m453IUVKDlJcGOWcDObpsGQfIdsDVZUwJqR4erx8kr9LTfo/SGnxaYlwbT91qlLWg4rGICWMTBwQjMjdMkc54rYUcS8tR6ovFxdbdniLwMlRDwtYvVbJJaTnJHVHh+smsmhyXyJg2GAlD8BUAgaZM4kDWsTbEJF/Q6EmeBjEPVpsYhkE3w5bNKntGD3uU/0p+3MX8sFUhCCJ9j6W9F28IFKGcIS6xu9fcfaYTenqNlF/q36nMKZD/XcSgciy351yzy5VuDx9DOVJC3WMySyvX8DtJnxel+1ff2pKrR1cQ9F+rvgcY9YOqrPtCTqCosiDbR61uP6ERfdQtIMM1JFz5LCuftJmGj7wdKpCHoKypplkSL545X31xQjVfqbxXRbJ29uveZLpdo48Y4KfTWBuEEcF8cppcCyCA5iOaxDZt70Zhol2uNAY5j7tIBxqkKkqC6IMYd8rCsoYrkZcysOz+/I/uRdUNVws5Tq8jbHg3R8dFBNP5mZW8JlWbcYbccsN59EwQiW6aWbyRCUKnrNXOrcRNAWFQE1LKPvjgL68zn+8RNuY= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(346002)(376002)(136003)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(26005)(316002)(103116003)(4326008)(36860700001)(54906003)(70206006)(41300700001)(6916009)(8936002)(5660300002)(82740400003)(47076005)(40480700001)(356005)(83380400001)(426003)(81166007)(86362001)(6666004)(40460700003)(478600001)(8676002)(1076003)(82310400005)(2616005)(70586007)(186003)(336012)(2906002)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2022 18:11:51.5707 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ad91d816-865d-4166-746b-08dad3c7856a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000B8EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6564 Machine frame number (mfn) is used to represent the hardware page address. This is an unsigned long variable. We need to check if it can hold the complete range of hardware page addresses. To ensure this we check that the count of bits represented by 'unsigned long' added to the bit index of page size, should be less than the count of bits required to represent the maximum physical address. Signed-off-by: Ayan Kumar Halder --- Currently this change will not have any impact on the existing architectures. The following table illustrates PADDR_BITS vs BITS_PER_LONG of different archs ------------------------------------------------ | Arch | PADDR_BITS | BITS_PER_LONG | ------------------------------------------------ | Arm_64 | 48 | 64 | | Arm_32 | 40 | 32 | | RISCV_64 | Don't know | 64 | | x86 | 52 | 64 | ------------------------------------------------- However, this will change when we introduce a platform (For eg Cortex-R52) which supports 32 bit physical address and BITS_PER_LONG. This platform does not follow the same code path as Arm_32. Thus, I have introduced this change as I don't see it causing a regression on any of the supported platforms. Changes from v1:- 1. Changed the check from "(PADDR_BITS > BITS_PER_LONG)" to "((PADDR_BITS - PAGE_SHIFT) >= BITS_PER_LONG)" 2. Updated the commit message to explain the reason for this. xen/common/page_alloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 62afb07bc6..c5b8c7444f 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2245,7 +2245,7 @@ void __init xenheap_max_mfn(unsigned long mfn) { ASSERT(!first_node_initialised); ASSERT(!xenheap_bits); - BUILD_BUG_ON(PADDR_BITS >= BITS_PER_LONG); + BUILD_BUG_ON((PADDR_BITS - PAGE_SHIFT) >= BITS_PER_LONG); xenheap_bits = min(flsl(mfn + 1) - 1 + PAGE_SHIFT, PADDR_BITS); printk(XENLOG_INFO "Xen heap: %u bits\n", xenheap_bits); }