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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v3 9/9] xen/arm: p2m: Enable support for 32bit IPA Date: Wed, 8 Feb 2023 12:05:29 +0000 Message-ID: <20230208120529.22313-10-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230208120529.22313-1-ayan.kumar.halder@amd.com> References: <20230208120529.22313-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT025:EE_|DM6PR12MB4186:EE_ X-MS-Office365-Filtering-Correlation-Id: cb541ae0-5344-43f2-5281-08db09cce097 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jMx+nu47epA0QL6HRtvziQrm6JLf5MYr0IGtyYhZN/lG/5bEwLBQpHQtT5sbooeEE8bGQd9m/kLfPLCY4Enjxlu+JYF9GOzeFKtwgojPADBe/FLY5FYRcs99G4RIsIfjH5eswgaUo75/VHXDpeZj1yMopYWmH0fiL+dFVo/DtoGVIuCngeFbhnmcyxxvvsQSOv95vo0WasmVSRLLl8Tcj+D6s9a+TDQKSvQVOvkd+SKB7pHH6Zb/LF+VKZZ5b1cDmfNAmgH91D4qwrCqDaxdGTtZWK9tfqvpp2ba/bVkhxrFobqrrGAM84W2BbLZyQCgkgVH2nQZlwo+oANbmUkdUj6yjwg4TPlsYkrxduLV1yd9yq90d3iRQH/6pYmsD/p45L60SNGP1QKDZp2OJt8ue2XaQd7hHZ8AtEJfYZlCg7GWr8pvjbrn8gs2jNKVcw52Lix+s07nDvIPf5UXP+UyMvb7opZ3m269mE9+IYQTowwDQ9QeCxZEQeV/PQh8KcXlsAdKDRz8/GPy53vkkde2weK0oOuKiLVNVH6lVqFdQidzkG2ObKSUZFY3doch3MKDR8zZTT5ZTt7M9NZ+xRrf853tHChbWGoch63N3y+s2+/Qy//967eIcFfFWM86HFd1jiRN1xTtKFnoNWRO7zZipbqlgwabBsOTDReMT9UVcMpjGFThjFJASgO9ovF/p6bZDN+mvW76V8EW1BfE/BIzQzQ/hNKLv4sTwaImh4YcYvM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(376002)(39860400002)(346002)(396003)(451199018)(40470700004)(36840700001)(46966006)(316002)(83380400001)(54906003)(47076005)(426003)(36756003)(82740400003)(8936002)(40480700001)(2906002)(41300700001)(36860700001)(7416002)(5660300002)(103116003)(356005)(86362001)(82310400005)(81166007)(6916009)(40460700003)(70586007)(70206006)(8676002)(4326008)(26005)(478600001)(186003)(336012)(1076003)(2616005)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2023 12:06:14.8736 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb541ae0-5344-43f2-5281-08db09cce097 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT025.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4186 VTCR.T0SZ should be set as 0x20 to support 32bit IPA. Refer ARM DDI 0487I.a ID081822, G8-9824, G8.2.171, VTCR, "Virtualization Translation Control Register" for the bit descriptions. Signed-off-by: Ayan Kumar Halder Acked-by: Stefano Stabellini --- Changes from - v1 - New patch. v2 - 1. Added Ack. xen/arch/arm/p2m.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 948f199d84..cfdea55e71 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -2266,13 +2266,17 @@ void __init setup_virt_paging(void) register_t val = VTCR_RES1|VTCR_SH0_IS|VTCR_ORGN0_WBWA|VTCR_IRGN0_WBWA; #ifdef CONFIG_ARM_32 - if ( p2m_ipa_bits < 40 ) + if ( p2m_ipa_bits < PADDR_BITS ) panic("P2M: Not able to support %u-bit IPA at the moment\n", p2m_ipa_bits); - printk("P2M: 40-bit IPA\n"); - p2m_ipa_bits = 40; + printk("P2M: %u-bit IPA\n",PADDR_BITS); + p2m_ipa_bits = PADDR_BITS; +#ifdef CONFIG_ARM_PA_32 + val |= VTCR_T0SZ(0x20); /* 32 bit IPA */ +#else val |= VTCR_T0SZ(0x18); /* 40 bit IPA */ +#endif val |= VTCR_SL0(0x1); /* P2M starts at first level */ #else /* CONFIG_ARM_64 */ static const struct {