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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v3 7/9] xen/arm: guest_walk: LPAE specific bits should be enclosed within "ifndef CONFIG_ARM_PA_32" Date: Wed, 8 Feb 2023 12:05:27 +0000 Message-ID: <20230208120529.22313-8-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230208120529.22313-1-ayan.kumar.halder@amd.com> References: <20230208120529.22313-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT103:EE_|MN0PR12MB6293:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d4f4065-f167-4b38-1f25-08db09ccdf62 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: a3D7XVw8xXkZxZS1H1ZxfEfHJU4ZzptkepB6BD4RMIy/T+s7FSO7PWc03nIdzERBVeEq6LQ0gHLPZbR1329iX6yJG9eYkrRss+J2ZfCjtIB3cM3Qp3GxxOU+dhJnbuJ3CST/FNZRrMUSk6DoQapUxj4dNAFl6I7qpFVcJyPhzH+n9kKOxSnu7bwKg7gCJOQ4AS1ysj7a2t6tAGRQ4g1iA1h50RRzsULdLdeiin435tlP7c1nxPEUo3O6qJRH7waRRZAuB9cRhdXUzozVPAE/AF6WExUevdgjOGjqk43xT7k0Y+MAeUymdd7FJV69Xty3AJzenK8UICyKoe99X3LL9JEpWQhqlpQRimXr0Tg0GzjUfh6zrpIdrizo0d5jl4oJ5vE1Hgek1bTvKdnO+NCIw0au9dkvKV6mpdMYFt7wxcpUrZCDiRbjIiadjPSLbQG1iPavDLcQW/aEMsYcK1NFQAMPtToDCEsZbc27lh792oFU0w5eklu0u8bn7I0z7HVJVxQajN0h8OY3ye8vqzwccj1CPKWOJ+5SwZxEB0ySATf5y0hOoJszNGsVhmb3TjpYSXhgnSdUFALaVckfmAsHPqL5o7tSevHk/CvN7NxCedS4l2Eq0XVFdmdrbUukBJ/bKgjk6T6Ky1PKhG9u425N7mBacmkYP/epQMwMXgeT/yDikw0Fhfk79qwcnWm+3r0IAB3U+xLX10MWlwQMfSitIhBu/hhi/NnSZz/YjnSL0WI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(376002)(136003)(39860400002)(346002)(451199018)(40470700004)(36840700001)(46966006)(316002)(54906003)(83380400001)(36860700001)(103116003)(336012)(40480700001)(426003)(47076005)(81166007)(86362001)(356005)(82310400005)(82740400003)(26005)(1076003)(40460700003)(2616005)(36756003)(6666004)(7416002)(478600001)(186003)(5660300002)(41300700001)(2906002)(8936002)(6916009)(8676002)(70206006)(4326008)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2023 12:06:12.7379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d4f4065-f167-4b38-1f25-08db09ccdf62 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT103.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6293 In the subsequent patch, we introduce "CONFIG_ARM_PA_32" to support 32 bit physical addresses. Thus, the code specific to "Large Physical Address Extension" (ie LPAE) should be enclosed within "ifndef CONFIG_ARM_PA_32". Refer xen/arch/arm/include/asm/short-desc.h, "short_desc_l1_supersec_t" unsigned int extbase1:4; /* Extended base address, PA[35:32] */ unsigned int extbase2:4; /* Extended base address, PA[39:36] */ Thus, extbase1 and extbase2 are not valid when 32 bit physical addresses are supported. Signed-off-by: Ayan Kumar Halder Acked-by: Stefano Stabellini --- Changes from - v1 - 1. Extracted from "[XEN v1 8/9] xen/arm: Other adaptations required to support 32bit paddr". v2 - 1. Reordered this patch so that it appears after CONFIG_ARM_PA_32 is introduced (in 6/9). xen/arch/arm/guest_walk.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/arm/guest_walk.c b/xen/arch/arm/guest_walk.c index 43d3215304..0feb7b76ec 100644 --- a/xen/arch/arm/guest_walk.c +++ b/xen/arch/arm/guest_walk.c @@ -154,8 +154,10 @@ static bool guest_walk_sd(const struct vcpu *v, mask = (1ULL << L1DESC_SUPERSECTION_SHIFT) - 1; *ipa = gva & mask; *ipa |= (paddr_t)(pte.supersec.base) << L1DESC_SUPERSECTION_SHIFT; +#ifndef CONFIG_ARM_PA_32 *ipa |= (paddr_t)(pte.supersec.extbase1) << L1DESC_SUPERSECTION_EXT_BASE1_SHIFT; *ipa |= (paddr_t)(pte.supersec.extbase2) << L1DESC_SUPERSECTION_EXT_BASE2_SHIFT; +#endif /* CONFIG_ARM_PA_32 */ } /* Set permissions so that the caller can check the flags by herself. */