@@ -242,6 +242,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str)
{"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1},
{"ipred-ctrl", 0x00000007, 2, CPUID_REG_EDX, 1, 1},
{"rrsba-ctrl", 0x00000007, 2, CPUID_REG_EDX, 2, 1},
+ {"ddp-ctrl", 0x00000007, 2, CPUID_REG_EDX, 3, 1},
{"bhi-ctrl", 0x00000007, 2, CPUID_REG_EDX, 4, 1},
{"mcdt-no", 0x00000007, 2, CPUID_REG_EDX, 5, 1},
@@ -216,7 +216,7 @@ static const char *const str_7d1[32] =
static const char *const str_7d2[32] =
{
[ 0] = "intel-psfd", [ 1] = "ipred-ctrl",
- [ 2] = "rrsba-ctrl",
+ [ 2] = "rrsba-ctrl", [ 3] = "ddp-ctrl",
[ 4] = "bhi-ctrl", [ 5] = "mcdt-no",
};
@@ -41,6 +41,7 @@
#define SPEC_CTRL_RRSBA_DIS_U (_AC(1, ULL) << 5)
#define SPEC_CTRL_RRSBA_DIS_S (_AC(1, ULL) << 6)
#define SPEC_CTRL_PSFD (_AC(1, ULL) << 7)
+#define SPEC_CTRL_DDP_DIS_U (_AC(1, ULL) << 8)
#define SPEC_CTRL_BHI_DIS_S (_AC(1, ULL) << 10)
#define MSR_PRED_CMD 0x00000049
@@ -294,6 +294,7 @@ XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected Processor Inventory
XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */
XEN_CPUFEATURE(IPRED_CTRL, 13*32+ 1) /* MSR_SPEC_CTRL.IPRED_DIS_* */
XEN_CPUFEATURE(RRSBA_CTRL, 13*32+ 2) /* MSR_SPEC_CTRL.RRSBA_DIS_* */
+XEN_CPUFEATURE(DDP_CTRL, 13*32+ 3) /* MSR_SPEC_CTRL.DDP_DIS_U */
XEN_CPUFEATURE(BHI_CTRL, 13*32+ 4) /* MSR_SPEC_CTRL.BHI_DIS_S */
XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */