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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v4 09/11] xen/arm: Restrict zeroeth_table_offset for ARM_64 Date: Tue, 21 Mar 2023 14:03:55 +0000 Message-ID: <20230321140357.24094-10-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230321140357.24094-1-ayan.kumar.halder@amd.com> References: <20230321140357.24094-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E653:EE_|PH8PR12MB7027:EE_ X-MS-Office365-Filtering-Correlation-Id: 1a272155-57fc-44ff-ffbe-08db2a155570 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RVpWBf5UMAPc3JtIylwptdldEDvP6JP5Fh4aDED56U4ShaWcROHsucl2ScnMgjMFSPC/7I1IEkTxF3BrbZWHJqNIuPPiW7niqCWyR6d4qdakBWFqe/98bu5dXNzy9AGunDvN8QUaUeG6Jv/YdMUNGSe6wsPtwa+fOkMWheU6APBYtXVLJZ4xA8uX4srzFz/dCBa5H/mi+LM3oTaaFkGdZOty6xZdrdLW08pwXAxlMMH8r2lLfcbsGv2GXhRU64d425VIYgpQOOf5FUebo410u4/jOz4Lk75os424jsU0qCvvKZfVT5o0u0V72asHtz2Pt37UAq8VX5JkuyBVpKwn7Ah3ehcoECFuns094EWpxlbqmu/29s1/+CVNR/8n2I+uyZPdt9vtTwoc8sdKNOzvMLtGDLpUcBWxBqerkZOUtw4vcA70mDXcueBpaX+yq1YODA5Ue5oh3hRLPzInoh+Arw8I8Fxsw5uvLjTXgSv5ojh4NeQdLlFMyQWevOx7yHjOIN1xxtqz8iA9KVg1JVvxu61MHDQmtgK5A8lUWIG7fO/7dkiqrlEO7+hzGPC2ZB6RgdKZrvWL4Dn9KNSN7U+BehixwJTamA39Vp+PSwy9kMXbhM/u9/ohLiXT9DKKzmZfOhHArMpOQWNZIyj+A+OEi5EzKAVc02VM0y0t5LX2OWXt98HRUsnopbQHovU6ywhLfMyZAyHZbZbU8XXoKiprvX+UzAUNicmYX6Ni/C0HrAGbVCPnI6wCTnFkBNwS2rNVGlF7uQA0GXIchJO/LpN5weHDwHNN4DtX/4V5d3/dq6E= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(346002)(39860400002)(136003)(376002)(451199018)(46966006)(40470700004)(36840700001)(82310400005)(2616005)(426003)(47076005)(83380400001)(86362001)(336012)(81166007)(82740400003)(36860700001)(40460700003)(356005)(36756003)(8936002)(6916009)(4326008)(8676002)(2906002)(70206006)(70586007)(41300700001)(40480700001)(478600001)(26005)(5660300002)(186003)(103116003)(54906003)(1076003)(7416002)(6666004)(316002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2023 14:05:31.8268 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1a272155-57fc-44ff-ffbe-08db2a155570 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E653.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7027 When 32 bit physical addresses are used (ie ARM_PA_32=y), "va >> ZEROETH_SHIFT" causes an overflow. Also, there is no zeroeth level page table on Arm 32-bit. Also took the opportunity to clean up dump_pt_walk(). One could use DECLARE_OFFSETS() macro instead of declaring the declaring an array of page table offsets. Acked-by: Julien Grall Reviewed-by: Stefano Stabellini Signed-off-by: Ayan Kumar Halder --- Changes from - v1 - Removed the duplicate declaration for DECLARE_OFFSETS. v2 - 1. Reworded the commit message. 2. Use CONFIG_ARM_PA_32 to restrict zeroeth_table_offset. v3 - 1. Added R-b and Ack. xen/arch/arm/include/asm/lpae.h | 4 ++++ xen/arch/arm/mm.c | 7 +------ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h index 3fdd5d0de2..0d40388f93 100644 --- a/xen/arch/arm/include/asm/lpae.h +++ b/xen/arch/arm/include/asm/lpae.h @@ -259,7 +259,11 @@ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr); #define first_table_offset(va) TABLE_OFFSET(first_linear_offset(va)) #define second_table_offset(va) TABLE_OFFSET(second_linear_offset(va)) #define third_table_offset(va) TABLE_OFFSET(third_linear_offset(va)) +#ifdef CONFIG_ARM_PA_BITS_32 +#define zeroeth_table_offset(va) 0 +#else #define zeroeth_table_offset(va) TABLE_OFFSET(zeroeth_linear_offset(va)) +#endif /* * Macros to define page-tables: diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index d8b43ef38c..41e0896b0f 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -221,12 +221,7 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr, { static const char *level_strs[4] = { "0TH", "1ST", "2ND", "3RD" }; const mfn_t root_mfn = maddr_to_mfn(ttbr); - const unsigned int offsets[4] = { - zeroeth_table_offset(addr), - first_table_offset(addr), - second_table_offset(addr), - third_table_offset(addr) - }; + DECLARE_OFFSETS(offsets, addr); lpae_t pte, *mapping; unsigned int level, root_table;