@@ -283,7 +283,7 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
u8 slot = PCI_SLOT(dev->devfn);
u8 func = PCI_FUNC(dev->devfn);
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSI);
if ( pos )
__msi_set_enable(seg, bus, slot, func, pos, enable);
}
@@ -291,12 +291,9 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
static void msix_set_enable(struct pci_dev *dev, int enable)
{
int pos;
- u16 control, seg = dev->seg;
- u8 bus = dev->bus;
- u8 slot = PCI_SLOT(dev->devfn);
- u8 func = PCI_FUNC(dev->devfn);
+ u16 control;
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
if ( pos )
{
control = pci_conf_read16(dev->sbdf, msix_control_reg(pos));
@@ -318,17 +315,12 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest)
{
struct msi_desc *entry = desc->msi_desc;
struct pci_dev *pdev;
- u16 seg, control;
- u8 bus, slot, func;
+ u16 control;
bool flag = host || guest, maskall;
ASSERT(spin_is_locked(&desc->lock));
BUG_ON(!entry || !entry->dev);
pdev = entry->dev;
- seg = pdev->seg;
- bus = pdev->bus;
- slot = PCI_SLOT(pdev->devfn);
- func = PCI_FUNC(pdev->devfn);
switch ( entry->msi_attrib.type )
{
case PCI_CAP_ID_MSI:
@@ -608,13 +600,10 @@ static int msi_capability_init(struct pci_dev *dev,
struct msi_desc *entry;
int pos;
unsigned int i, mpos;
- u16 control, seg = dev->seg;
- u8 bus = dev->bus;
- u8 slot = PCI_SLOT(dev->devfn);
- u8 func = PCI_FUNC(dev->devfn);
+ u16 control;
ASSERT(pcidevs_locked());
- pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSI);
if ( !pos )
return -ENODEV;
control = pci_conf_read16(dev->sbdf, msi_control_reg(pos));
@@ -685,8 +674,8 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot, u8 func, u8 bir, int vf)
{
struct pci_dev *pdev = pci_get_pdev(NULL,
PCI_SBDF(seg, bus, slot, func));
- unsigned int pos = pci_find_ext_capability(seg, bus,
- PCI_DEVFN(slot, func),
+ unsigned int pos = pci_find_ext_capability(PCI_SBDF(seg, bus, slot,
+ func),
PCI_EXT_CAP_ID_SRIOV);
uint16_t ctrl = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
pos + PCI_SRIOV_CTRL);
@@ -777,8 +766,7 @@ static int msix_capability_init(struct pci_dev *dev,
u8 slot = PCI_SLOT(dev->devfn);
u8 func = PCI_FUNC(dev->devfn);
bool maskall = msix->host_maskall, zap_on_error = false;
- unsigned int pos = pci_find_cap_offset(seg, bus, slot, func,
- PCI_CAP_ID_MSIX);
+ unsigned int pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
if ( !pos )
return -ENODEV;
@@ -1102,12 +1090,7 @@ static void _pci_cleanup_msix(struct arch_msix *msix)
static void __pci_disable_msix(struct msi_desc *entry)
{
struct pci_dev *dev = entry->dev;
- u16 seg = dev->seg;
- u8 bus = dev->bus;
- u8 slot = PCI_SLOT(dev->devfn);
- u8 func = PCI_FUNC(dev->devfn);
- unsigned int pos = pci_find_cap_offset(seg, bus, slot, func,
- PCI_CAP_ID_MSIX);
+ unsigned int pos = pci_find_cap_offset(dev->sbdf, PCI_CAP_ID_MSIX);
u16 control = pci_conf_read16(dev->sbdf,
msix_control_reg(entry->msi_attrib.pos));
bool maskall = dev->msix->host_maskall;
@@ -1211,8 +1194,7 @@ void pci_cleanup_msi(struct pci_dev *pdev)
int pci_reset_msix_state(struct pci_dev *pdev)
{
- unsigned int pos = pci_find_cap_offset(pdev->seg, pdev->bus, pdev->sbdf.dev,
- pdev->sbdf.fn, PCI_CAP_ID_MSIX);
+ unsigned int pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
ASSERT(pos);
/*
@@ -1234,10 +1216,6 @@ int pci_reset_msix_state(struct pci_dev *pdev)
int pci_msi_conf_write_intercept(struct pci_dev *pdev, unsigned int reg,
unsigned int size, uint32_t *data)
{
- u16 seg = pdev->seg;
- u8 bus = pdev->bus;
- u8 slot = PCI_SLOT(pdev->devfn);
- u8 func = PCI_FUNC(pdev->devfn);
struct msi_desc *entry;
unsigned int pos;
@@ -1245,8 +1223,7 @@ int pci_msi_conf_write_intercept(struct pci_dev *pdev, unsigned int reg,
{
entry = find_msi_entry(pdev, -1, PCI_CAP_ID_MSIX);
pos = entry ? entry->msi_attrib.pos
- : pci_find_cap_offset(seg, bus, slot, func,
- PCI_CAP_ID_MSIX);
+ : pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
ASSERT(pos);
if ( reg >= pos && reg < msix_pba_offset_reg(pos) + 4 )
@@ -687,7 +687,8 @@ static unsigned int __init __find_dbgp(u8 bus, u8 slot, u8 func)
if ( (class >> 8) != PCI_CLASS_SERIAL_USB_EHCI )
return 0;
- return pci_find_cap_offset(0, bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
+ return pci_find_cap_offset(PCI_SBDF(0, bus, slot, func),
+ PCI_CAP_ID_EHCI_DEBUG);
}
static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp,
@@ -27,7 +27,7 @@ static int __init get_iommu_msi_capabilities(
{
int pos;
- pos = pci_find_cap_offset(seg, bus, dev, func, PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(PCI_SBDF(seg, bus, dev, func), PCI_CAP_ID_MSI);
if ( !pos )
return -ENODEV;
@@ -24,11 +24,9 @@ boolean_param("ats", ats_enabled);
int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list)
{
u32 value;
- u16 seg = pdev->seg;
- u8 bus = pdev->bus, devfn = pdev->devfn;
int pos;
- pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ATS);
BUG_ON(!pos);
if ( iommu_verbose )
@@ -32,7 +32,8 @@ static inline int pci_ats_enabled(int seg, int bus, int devfn)
u32 value;
int pos;
- pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(PCI_SBDF(seg, bus, devfn),
+ PCI_EXT_CAP_ID_ATS);
BUG_ON(!pos);
value = pci_conf_read16(PCI_SBDF(seg, bus, devfn), pos + ATS_REG_CTL);
@@ -45,7 +46,8 @@ static inline int pci_ats_device(int seg, int bus, int devfn)
if ( !ats_enabled )
return 0;
- return pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
+ return pci_find_ext_capability(PCI_SBDF(seg, bus, devfn),
+ PCI_EXT_CAP_ID_ATS);
}
#endif /* _ATS_H_ */
@@ -24,8 +24,7 @@ int pdev_msi_init(struct pci_dev *pdev)
INIT_LIST_HEAD(&pdev->msi_list);
- pos = pci_find_cap_offset(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn), PCI_CAP_ID_MSI);
+ pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSI);
if ( pos )
{
uint16_t ctrl = pci_conf_read16(pdev->sbdf, msi_control_reg(pos));
@@ -33,8 +32,7 @@ int pdev_msi_init(struct pci_dev *pdev)
pdev->msi_maxvec = multi_msi_capable(ctrl);
}
- pos = pci_find_cap_offset(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn), PCI_CAP_ID_MSIX);
+ pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
if ( pos )
{
struct arch_msix *msix = xzalloc(struct arch_msix);
@@ -361,8 +361,7 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
break;
case DEV_TYPE_PCIe_ENDPOINT:
- pos = pci_find_cap_offset(pseg->nr, bus, PCI_SLOT(devfn),
- PCI_FUNC(devfn), PCI_CAP_ID_EXP);
+ pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP);
BUG_ON(!pos);
cap = pci_conf_read16(pdev->sbdf, pos + PCI_EXP_DEVCAP);
if ( cap & PCI_EXP_DEVCAP_PHANTOM )
@@ -565,13 +564,12 @@ struct pci_dev *pci_get_pdev(const struct domain *d, pci_sbdf_t sbdf)
static void pci_enable_acs(struct pci_dev *pdev)
{
int pos;
- u16 cap, ctrl, seg = pdev->seg;
- u8 bus = pdev->bus;
+ u16 cap, ctrl;
if ( !is_iommu_enabled(pdev->domain) )
return;
- pos = pci_find_ext_capability(seg, bus, pdev->devfn, PCI_EXT_CAP_ID_ACS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ACS);
if (!pos)
return;
@@ -704,7 +702,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn,
if ( !pdev->info.is_virtfn && !pdev->vf_rlen[0] )
{
- unsigned int pos = pci_find_ext_capability(seg, bus, devfn,
+ unsigned int pos = pci_find_ext_capability(pdev->sbdf,
PCI_EXT_CAP_ID_SRIOV);
uint16_t ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_SRIOV_CTRL);
@@ -916,7 +914,7 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn)
{
u16 class_device, creg;
u8 d = PCI_SLOT(devfn), f = PCI_FUNC(devfn);
- int pos = pci_find_cap_offset(seg, bus, d, f, PCI_CAP_ID_EXP);
+ int pos = pci_find_cap_offset(PCI_SBDF(seg, bus, devfn), PCI_CAP_ID_EXP);
class_device = pci_conf_read16(PCI_SBDF(seg, bus, d, f), PCI_CLASS_DEVICE);
switch ( class_device )
@@ -1184,10 +1182,7 @@ static int hest_match_pci(const struct acpi_hest_aer_common *p,
static bool_t hest_match_type(const struct acpi_hest_header *hest_hdr,
const struct pci_dev *pdev)
{
- unsigned int pos = pci_find_cap_offset(pdev->seg, pdev->bus,
- PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn),
- PCI_CAP_ID_EXP);
+ unsigned int pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP);
u8 pcie = MASK_EXTR(pci_conf_read16(pdev->sbdf, pos + PCI_EXP_FLAGS),
PCI_EXP_FLAGS_TYPE);
@@ -1258,8 +1253,7 @@ bool_t pcie_aer_get_firmware_first(const struct pci_dev *pdev)
{
struct aer_hest_parse_info info = { .pdev = pdev };
- return pci_find_cap_offset(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn), PCI_CAP_ID_EXP) &&
+ return pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_EXP) &&
apei_hest_parse(aer_hest_parse, &info) >= 0 &&
info.firmware_first;
}
@@ -495,8 +495,6 @@ int me_wifi_quirk(struct domain *domain, uint8_t bus, uint8_t devfn,
void pci_vtd_quirk(const struct pci_dev *pdev)
{
- int seg = pdev->seg;
- int bus = pdev->bus;
int pos;
bool_t ff;
u32 val, val2;
@@ -532,12 +530,10 @@ void pci_vtd_quirk(const struct pci_dev *pdev)
/* Sandybridge-EP (Romley) */
case 0x3c00: /* host bridge */
case 0x3c01 ... 0x3c0b: /* root ports */
- pos = pci_find_ext_capability(seg, bus, pdev->devfn,
- PCI_EXT_CAP_ID_ERR);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ERR);
if ( !pos )
{
- pos = pci_find_ext_capability(seg, bus, pdev->devfn,
- PCI_EXT_CAP_ID_VNDR);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_VNDR);
while ( pos )
{
val = pci_conf_read32(pdev->sbdf, pos + PCI_VNDR_HEADER);
@@ -546,7 +542,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev)
pos += PCI_VNDR_HEADER;
break;
}
- pos = pci_find_next_ext_capability(seg, bus, pdev->devfn, pos,
+ pos = pci_find_next_ext_capability(pdev->sbdf, pos,
PCI_EXT_CAP_ID_VNDR);
}
ff = 0;
@@ -57,8 +57,7 @@ int ats_device(const struct pci_dev *pdev, const struct acpi_drhd_unit *drhd)
return 0;
ats_drhd = find_ats_dev_drhd(drhd->iommu);
- pos = pci_find_ext_capability(pdev->seg, pdev->bus, pdev->devfn,
- PCI_EXT_CAP_ID_ATS);
+ pos = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_ATS);
if ( pos && (ats_drhd == NULL) )
{
@@ -8,25 +8,25 @@
#include <xen/pci.h>
#include <xen/pci_regs.h>
-int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap)
+int pci_find_cap_offset(pci_sbdf_t sbdf, u8 cap)
{
u8 id;
int max_cap = 48;
u8 pos = PCI_CAPABILITY_LIST;
u16 status;
- status = pci_conf_read16(PCI_SBDF(seg, bus, dev, func), PCI_STATUS);
+ status = pci_conf_read16(sbdf, PCI_STATUS);
if ( (status & PCI_STATUS_CAP_LIST) == 0 )
return 0;
while ( max_cap-- )
{
- pos = pci_conf_read8(PCI_SBDF(seg, bus, dev, func), pos);
+ pos = pci_conf_read8(sbdf, pos);
if ( pos < 0x40 )
break;
pos &= ~3;
- id = pci_conf_read8(PCI_SBDF(seg, bus, dev, func), pos + PCI_CAP_LIST_ID);
+ id = pci_conf_read8(sbdf, pos + PCI_CAP_LIST_ID);
if ( id == 0xff )
break;
@@ -39,19 +39,19 @@ int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap)
return 0;
}
-int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap)
+int pci_find_next_cap(pci_sbdf_t sbdf, u8 pos, int cap)
{
u8 id;
int ttl = 48;
while ( ttl-- )
{
- pos = pci_conf_read8(PCI_SBDF(seg, bus, devfn), pos);
+ pos = pci_conf_read8(sbdf, pos);
if ( pos < 0x40 )
break;
pos &= ~3;
- id = pci_conf_read8(PCI_SBDF(seg, bus, devfn), pos + PCI_CAP_LIST_ID);
+ id = pci_conf_read8(sbdf, pos + PCI_CAP_LIST_ID);
if ( id == 0xff )
break;
@@ -65,21 +65,21 @@ int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap)
/**
* pci_find_ext_capability - Find an extended capability
- * @seg/@bus/@devfn: PCI device to query
+ * @sbdf: PCI device to query
* @cap: capability code
*
* Returns the address of the requested extended capability structure
* within the device's PCI configuration space or 0 if the device does
* not support it.
*/
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
+int pci_find_ext_capability(pci_sbdf_t sbdf, int cap)
{
- return pci_find_next_ext_capability(seg, bus, devfn, 0, cap);
+ return pci_find_next_ext_capability(sbdf, 0, cap);
}
/**
* pci_find_next_ext_capability - Find another extended capability
- * @seg/@bus/@devfn: PCI device to query
+ * @sbdf: PCI device to query
* @start: starting position
* @cap: capability code
*
@@ -87,13 +87,13 @@ int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
* within the device's PCI configuration space or 0 if the device does
* not support it.
*/
-int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap)
+int pci_find_next_ext_capability(pci_sbdf_t sbdf, int start, int cap)
{
u32 header;
int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
int pos = max(start, 0x100);
- header = pci_conf_read32(PCI_SBDF(seg, bus, devfn), pos);
+ header = pci_conf_read32(sbdf, pos);
/*
* If we have no capabilities, this is indicated by cap ID,
@@ -109,7 +109,7 @@ int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap
pos = PCI_EXT_CAP_NEXT(header);
if ( pos < 0x100 )
break;
- header = pci_conf_read32(PCI_SBDF(seg, bus, devfn), pos);
+ header = pci_conf_read32(sbdf, pos);
}
return 0;
}
@@ -184,9 +184,7 @@ static void cf_check mask_write(
static int cf_check init_msi(struct pci_dev *pdev)
{
- uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn);
- unsigned int pos = pci_find_cap_offset(pdev->seg, pdev->bus, slot, func,
- PCI_CAP_ID_MSI);
+ unsigned int pos = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSI);
uint16_t control;
int ret;
@@ -659,14 +659,12 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
static int cf_check init_msix(struct pci_dev *pdev)
{
struct domain *d = pdev->domain;
- uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn);
unsigned int msix_offset, i, max_entries;
uint16_t control;
struct vpci_msix *msix;
int rc;
- msix_offset = pci_find_cap_offset(pdev->seg, pdev->bus, slot, func,
- PCI_CAP_ID_MSIX);
+ msix_offset = pci_find_cap_offset(pdev->sbdf, PCI_CAP_ID_MSIX);
if ( !msix_offset )
return 0;
@@ -193,11 +193,10 @@ int pci_mmcfg_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value);
int pci_mmcfg_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value);
-int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap);
-int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap);
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap);
-int pci_find_next_ext_capability(int seg, int bus, int devfn, int start,
- int cap);
+int pci_find_cap_offset(pci_sbdf_t sbdf, u8 cap);
+int pci_find_next_cap(pci_sbdf_t sbdf, u8 pos, int cap);
+int pci_find_ext_capability(pci_sbdf_t sbdf, int cap);
+int pci_find_next_ext_capability(pci_sbdf_t sbdf, int start, int cap);
const char *parse_pci(const char *, unsigned int *seg, unsigned int *bus,
unsigned int *dev, unsigned int *func);
const char *parse_pci_seg(const char *, unsigned int *seg, unsigned int *bus,
Convert pci_find_*cap* functions and call sites to pci_sbdf_t, and remove some now unused local variables. No functional change. Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com> --- I built with EXTRA_CFLAGS_XEN_CORE="-Wunused-but-set-variable" (and unfortunately -Wno-error=unused-but-set-variable too) to identify locations of unneeded local variables as a result of the change to pci_sbdf_t. v2->v3: * new patch --- xen/arch/x86/msi.c | 47 ++++++---------------- xen/drivers/char/ehci-dbgp.c | 3 +- xen/drivers/passthrough/amd/iommu_detect.c | 2 +- xen/drivers/passthrough/ats.c | 4 +- xen/drivers/passthrough/ats.h | 6 ++- xen/drivers/passthrough/msi.c | 6 +-- xen/drivers/passthrough/pci.c | 20 ++++----- xen/drivers/passthrough/vtd/quirks.c | 10 ++--- xen/drivers/passthrough/vtd/x86/ats.c | 3 +- xen/drivers/pci/pci.c | 28 ++++++------- xen/drivers/vpci/msi.c | 4 +- xen/drivers/vpci/msix.c | 4 +- xen/include/xen/pci.h | 9 ++--- 13 files changed, 53 insertions(+), 93 deletions(-)