From patchwork Tue Oct 3 06:24:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 13406920 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB516E7542F for ; Tue, 3 Oct 2023 07:06:41 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.611982.951835 (Exim 4.92) (envelope-from ) id 1qnZUG-00074U-Ut; Tue, 03 Oct 2023 07:06:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 611982.951835; Tue, 03 Oct 2023 07:06:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qnZUG-00073y-PJ; Tue, 03 Oct 2023 07:06:32 +0000 Received: by outflank-mailman (input) for mailman id 611982; Tue, 03 Oct 2023 07:06:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qnZJ1-00040o-Ml for xen-devel@lists.xenproject.org; Tue, 03 Oct 2023 06:54:55 +0000 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c16f407c-61b9-11ee-98d2-6d05b1d4d9a1; Tue, 03 Oct 2023 08:54:54 +0200 (CEST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Oct 2023 23:54:46 -0700 Received: from unknown (HELO fred..) ([172.25.112.68]) by fmsmga005.fm.intel.com with ESMTP; 02 Oct 2023 23:54:46 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c16f407c-61b9-11ee-98d2-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696316094; x=1727852094; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vZ6vels66+tC8YRpSCj8dEsAAUPLXovJkO1WpIp9s0Y=; b=aRR3S1LIt2CdLqsFzvgishhnCPpIpbMVF6iZvGeaniPUeJ5JXtmELUg3 V0Fo0AkMMj851vAZ2WGpimqdn68EU8++sknXnq+qc0VqDV+zusIHwcvIu Zw8rgZtzz+QWgDiKk0Ujq6Kzv8XyO+GeXqt8OlUQ/62dfzz49ukJVuv/E D6oxhUylh5BVCLRgACAzX3Nj7xvMq61u9rmgX0M/MTfbhfP5dy+KmeOdV ZAEahm7BecIFh1rFUP+B8js6TpOABvYCXp9YHA/hLHY2pyqr2AonYeKW6 aODlvCsYP38yl1Ky0n/IEcfZUo3gWJ/cDKSlM2vDqOYBZ7wW3ymc2Vt+0 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="367858183" X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="367858183" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="1081900971" X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="1081900971" From: Xin Li To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-hyperv@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, luto@kernel.org, pbonzini@redhat.com, seanjc@google.com, peterz@infradead.org, jgross@suse.com, ravi.v.shankar@intel.com, mhiramat@kernel.org, andrew.cooper3@citrix.com, jiangshanlai@gmail.com, nik.borisov@suse.com Subject: [PATCH v12 23/37] x86/fred: Make exc_page_fault() work for FRED Date: Mon, 2 Oct 2023 23:24:44 -0700 Message-Id: <20231003062458.23552-24-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003062458.23552-1-xin3.li@intel.com> References: <20231003062458.23552-1-xin3.li@intel.com> MIME-Version: 1.0 From: "H. Peter Anvin (Intel)" On a FRED system, the faulting address (CR2) is passed on the stack, to avoid the problem of transient state. Thus we get the page fault address from the stack instead of CR2. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Thomas Gleixner Signed-off-by: Xin Li --- arch/x86/mm/fault.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index ab778eac1952..7675bc067153 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -34,6 +34,7 @@ #include /* kvm_handle_async_pf */ #include /* fixup_vdso_exception() */ #include +#include #define CREATE_TRACE_POINTS #include @@ -1516,8 +1517,10 @@ handle_page_fault(struct pt_regs *regs, unsigned long error_code, DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault) { - unsigned long address = read_cr2(); irqentry_state_t state; + unsigned long address; + + address = cpu_feature_enabled(X86_FEATURE_FRED) ? fred_event_data(regs) : read_cr2(); prefetchw(¤t->mm->mmap_lock);