From patchwork Mon Dec 4 09:43:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 13478013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57B33C4167B for ; Mon, 4 Dec 2023 09:43:23 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.646676.1009192 (Exim 4.92) (envelope-from ) id 1rA5Tu-0003SB-4D; Mon, 04 Dec 2023 09:43:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 646676.1009192; Mon, 04 Dec 2023 09:43:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rA5Tu-0003Ry-0m; Mon, 04 Dec 2023 09:43:14 +0000 Received: by outflank-mailman (input) for mailman id 646676; Mon, 04 Dec 2023 09:43:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rA5Ts-0003Ag-9b for xen-devel@lists.xenproject.org; Mon, 04 Dec 2023 09:43:12 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 89e2e47a-9289-11ee-98e5-6d05b1d4d9a1; Mon, 04 Dec 2023 10:43:11 +0100 (CET) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-40c0e7b8a9bso2011305e9.3 for ; Mon, 04 Dec 2023 01:43:11 -0800 (PST) Received: from localhost ([213.195.113.99]) by smtp.gmail.com with ESMTPSA id ay10-20020a05600c1e0a00b0040b397787d3sm18118985wmb.24.2023.12.04.01.43.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Dec 2023 01:43:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 89e2e47a-9289-11ee-98e5-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1701682990; x=1702287790; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MxO8kpq0zK2+9/dmZfmOLjwVt6zHQvWLIdUhj8WPZVM=; b=o+ag6wX358A0L9bC1SFExuqSuOXKIlaivYVl9JA9b2yCQjn2V8LotZ5dw62LSgqBGz 4mxHNr8or8N+UwYZMBhwpBW2BrSBKZXJokluYwOkgEhfnymwJ2mvecDV/DjkeX/LJ/HN rCOPq9KIN7Rlwko4q6ef2DnI5WFef6gMcST+k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701682990; x=1702287790; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MxO8kpq0zK2+9/dmZfmOLjwVt6zHQvWLIdUhj8WPZVM=; b=CRNbGBK+RG2z/f5z5aQiH167hz/jHaiviBZZJ7c56zUcibE4OWK/GXrjK5cO8s/7hE mHBQ4rRiCAHmh3ngFMhS9AiH73tot9mq0B0OdoEiXkdjLv9Cf6ssNx3ReqeVTruF8E11 wddEMOB3npi6bQH80QrzKlHqPwwQUYzybQhmWkilvjPtJQQ1UKNLtslrF0drL8jgHQbv BjP5E2e5lAH3poyH5Lp6rxrQyf1osoX0ERi24z6hAGmfph1Z2v8MPGdSNP+H/Y7R00xE hbnfd7RkbI5Gwq4nQ6OZY+QhOLY7QxILVfgY8pl+3EE1Bag4AMrYmd8CkAK14MACJeQ6 mSNg== X-Gm-Message-State: AOJu0YykvtM6qI5XiVjAH8VE7MWuP7hd9xV0Zupq0pv0RSUsIfrI2utS ax8j4zeZw1aW2co4VMp+SJ+46rTxdeg7j3XT4ZM= X-Google-Smtp-Source: AGHT+IGNDDJBhs2J/PSzOTWY71/KIecXkzghzzN/EJTD2aDL9SiW7LnxYg4whlqxv6/bRoeVEDKriQ== X-Received: by 2002:a05:600c:2946:b0:40b:5e21:dd19 with SMTP id n6-20020a05600c294600b0040b5e21dd19mr2293899wmd.71.1701682990720; Mon, 04 Dec 2023 01:43:10 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 2/6] amd-vi: set IOMMU page table levels based on guest reported paddr width Date: Mon, 4 Dec 2023 10:43:01 +0100 Message-ID: <20231204094305.59267-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204094305.59267-1-roger.pau@citrix.com> References: <20231204094305.59267-1-roger.pau@citrix.com> MIME-Version: 1.0 However take into account the minimum number of levels required by unity maps when setting the page table levels. The previous setting of the page table levels for PV guests based on the highest RAM address was bogus, as there can be other non-RAM regions past the highest RAM address that need to be mapped, for example device MMIO. For HVM we also take amd_iommu_min_paging_mode into account, however if unity maps require more than 4 levels attempting to add those will currently fail at the p2m level, as 4 levels is the maximum supported. Fixes: 0700c962ac2d ('Add AMD IOMMU support into hypervisor') Signed-off-by: Roger Pau Monné --- changes since v1: - Use paging_max_paddr_bits() instead of hardcoding DEFAULT_DOMAIN_ADDRESS_WIDTH. --- xen/drivers/passthrough/amd/pci_amd_iommu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c index 6bc73dc21052..00a25e649f22 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -359,21 +359,17 @@ int __read_mostly amd_iommu_min_paging_mode = 1; static int cf_check amd_iommu_domain_init(struct domain *d) { struct domain_iommu *hd = dom_iommu(d); + int pglvl = amd_iommu_get_paging_mode( + PFN_DOWN(1UL << paging_max_paddr_bits(d))); + + if ( pglvl < 0 ) + return pglvl; /* - * Choose the number of levels for the IOMMU page tables. - * - PV needs 3 or 4, depending on whether there is RAM (including hotplug - * RAM) above the 512G boundary. - * - HVM could in principle use 3 or 4 depending on how much guest - * physical address space we give it, but this isn't known yet so use 4 - * unilaterally. - * - Unity maps may require an even higher number. + * Choose the number of levels for the IOMMU page tables, taking into + * account unity maps. */ - hd->arch.amd.paging_mode = max(amd_iommu_get_paging_mode( - is_hvm_domain(d) - ? 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) - : get_upper_mfn_bound() + 1), - amd_iommu_min_paging_mode); + hd->arch.amd.paging_mode = max(pglvl, amd_iommu_min_paging_mode); return 0; }