From patchwork Thu Apr 4 11:38:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13617595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9AD5DCD1292 for ; Thu, 4 Apr 2024 11:38:51 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.700829.1094557 (Exim 4.92) (envelope-from ) id 1rsLQa-0005ai-8j; Thu, 04 Apr 2024 11:38:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 700829.1094557; Thu, 04 Apr 2024 11:38:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsLQa-0005ab-5X; Thu, 04 Apr 2024 11:38:44 +0000 Received: by outflank-mailman (input) for mailman id 700829; Thu, 04 Apr 2024 11:38:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsLQY-0005aV-Lg for xen-devel@lists.xenproject.org; Thu, 04 Apr 2024 11:38:42 +0000 Received: from pb-smtp20.pobox.com (pb-smtp20.pobox.com [173.228.157.52]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e0881ef3-f277-11ee-afe5-a90da7624cb6; Thu, 04 Apr 2024 13:38:40 +0200 (CEST) Received: from pb-smtp20.pobox.com (unknown [127.0.0.1]) by pb-smtp20.pobox.com (Postfix) with ESMTP id D0DC019DDC; Thu, 4 Apr 2024 07:38:36 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp20.sea.icgroup.com (unknown [127.0.0.1]) by pb-smtp20.pobox.com (Postfix) with ESMTP id BBB3D19DDB; Thu, 4 Apr 2024 07:38:36 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp20.pobox.com (Postfix) with ESMTPSA id 5E89C19DDA; Thu, 4 Apr 2024 07:38:33 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e0881ef3-f277-11ee-afe5-a90da7624cb6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=CzowhB/F826RPhGo1uOo6VB4C1CV4lZHEyGc69Nr1QI=; b=eZxx FNbuQ30ZcbS16sHniizgrnZ5RTHEYjPNSqV0+B3Pdob6ctz6XjzzWRCRYtovlea4 Pw6N8V1sgTeE0ZZr74qMnbxDtddiBnMx9v3KRJBl3noUfpWAmO3f31nJWZSj9lFW BDJVxRfH0WGCzJjbBSEuynOa5c3pekNrIS4wQWk= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , Sergiy Kibrik Subject: [PATCH] x86/MCE: move intel mcheck init code to separate file Date: Thu, 4 Apr 2024 14:38:28 +0300 Message-Id: <20240404113828.2535191-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: DDF69B4E-F277-11EE-9825-F515D2CDFF5E-90055647!pb-smtp20.pobox.com Separate Intel nonfatal MCE initialization code from generic MCE code, the same way it is done for AMD code. This is to be able to later make intel/amd MCE code optional in the build. Also clean up unused includes. No functional change intended. Signed-off-by: Sergiy Kibrik --- xen/arch/x86/cpu/mcheck/Makefile | 1 + xen/arch/x86/cpu/mcheck/intel_nonfatal.c | 83 ++++++++++++++++++++++++ xen/arch/x86/cpu/mcheck/mce.h | 1 + xen/arch/x86/cpu/mcheck/non-fatal.c | 82 +---------------------- 4 files changed, 86 insertions(+), 81 deletions(-) create mode 100644 xen/arch/x86/cpu/mcheck/intel_nonfatal.c diff --git a/xen/arch/x86/cpu/mcheck/Makefile b/xen/arch/x86/cpu/mcheck/Makefile index 0d63ff9096..bb9908dede 100644 --- a/xen/arch/x86/cpu/mcheck/Makefile +++ b/xen/arch/x86/cpu/mcheck/Makefile @@ -2,6 +2,7 @@ obj-y += amd_nonfatal.o obj-y += mce_amd.o obj-y += mcaction.o obj-y += barrier.o +obj-y += intel_nonfatal.o obj-y += mctelem.o obj-y += mce.o obj-y += mce-apei.o diff --git a/xen/arch/x86/cpu/mcheck/intel_nonfatal.c b/xen/arch/x86/cpu/mcheck/intel_nonfatal.c new file mode 100644 index 0000000000..0085948dba --- /dev/null +++ b/xen/arch/x86/cpu/mcheck/intel_nonfatal.c @@ -0,0 +1,83 @@ +/* + * Non Fatal Machine Check Exception Reporting + * + * (C) Copyright 2002 Dave Jones. + * + * This file contains routines to check for non-fatal MCEs every 15s + * + */ + +#include + +#include "mce.h" +#include "vmce.h" + +static struct timer mce_timer; + +#define MCE_PERIOD MILLISECS(8000) +#define MCE_PERIOD_MIN MILLISECS(2000) +#define MCE_PERIOD_MAX MILLISECS(16000) + +static uint64_t period = MCE_PERIOD; +static int adjust = 0; +static int variable_period = 1; + +static void cf_check mce_checkregs(void *info) +{ + mctelem_cookie_t mctc; + struct mca_summary bs; + static uint64_t dumpcount = 0; + + mctc = mcheck_mca_logout(MCA_POLLER, this_cpu(poll_bankmask), + &bs, NULL); + + if (bs.errcnt && mctc != NULL) { + adjust++; + + /* If Dom0 enabled the VIRQ_MCA event, then notify it. + * Otherwise, if dom0 has had plenty of time to register + * the virq handler but still hasn't then dump telemetry + * to the Xen console. The call count may be incremented + * on multiple cpus at once and is indicative only - just + * a simple-minded attempt to avoid spamming the console + * for corrected errors in early startup. + */ + + if (dom0_vmce_enabled()) { + mctelem_commit(mctc); + send_global_virq(VIRQ_MCA); + } else if (++dumpcount >= 10) { + x86_mcinfo_dump((struct mc_info *)mctelem_dataptr(mctc)); + mctelem_dismiss(mctc); + } else { + mctelem_dismiss(mctc); + } + } else if (mctc != NULL) { + mctelem_dismiss(mctc); + } +} + +static void cf_check mce_work_fn(void *data) +{ + on_each_cpu(mce_checkregs, NULL, 1); + + if (variable_period) { + if (adjust) + period /= (adjust + 1); + else + period *= 2; + if (period > MCE_PERIOD_MAX) + period = MCE_PERIOD_MAX; + if (period < MCE_PERIOD_MIN) + period = MCE_PERIOD_MIN; + } + + set_timer(&mce_timer, NOW() + period); + adjust = 0; +} + +void __init intel_nonfatal_mcheck_init(struct cpuinfo_x86 *unused) +{ + init_timer(&mce_timer, mce_work_fn, NULL, 0); + set_timer(&mce_timer, NOW() + MCE_PERIOD); +} diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h index 7f26afae23..4806405f96 100644 --- a/xen/arch/x86/cpu/mcheck/mce.h +++ b/xen/arch/x86/cpu/mcheck/mce.h @@ -47,6 +47,7 @@ enum mcheck_type amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp); enum mcheck_type intel_mcheck_init(struct cpuinfo_x86 *c, bool bsp); void amd_nonfatal_mcheck_init(struct cpuinfo_x86 *c); +void intel_nonfatal_mcheck_init(struct cpuinfo_x86 *c); extern unsigned int firstbank; extern unsigned int ppin_msr; diff --git a/xen/arch/x86/cpu/mcheck/non-fatal.c b/xen/arch/x86/cpu/mcheck/non-fatal.c index 1c0c32ba08..33cacd15c2 100644 --- a/xen/arch/x86/cpu/mcheck/non-fatal.c +++ b/xen/arch/x86/cpu/mcheck/non-fatal.c @@ -7,84 +7,7 @@ * */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - #include "mce.h" -#include "vmce.h" - -static struct timer mce_timer; - -#define MCE_PERIOD MILLISECS(8000) -#define MCE_PERIOD_MIN MILLISECS(2000) -#define MCE_PERIOD_MAX MILLISECS(16000) - -static uint64_t period = MCE_PERIOD; -static int adjust = 0; -static int variable_period = 1; - -static void cf_check mce_checkregs(void *info) -{ - mctelem_cookie_t mctc; - struct mca_summary bs; - static uint64_t dumpcount = 0; - - mctc = mcheck_mca_logout(MCA_POLLER, this_cpu(poll_bankmask), - &bs, NULL); - - if (bs.errcnt && mctc != NULL) { - adjust++; - - /* If Dom0 enabled the VIRQ_MCA event, then notify it. - * Otherwise, if dom0 has had plenty of time to register - * the virq handler but still hasn't then dump telemetry - * to the Xen console. The call count may be incremented - * on multiple cpus at once and is indicative only - just - * a simple-minded attempt to avoid spamming the console - * for corrected errors in early startup. - */ - - if (dom0_vmce_enabled()) { - mctelem_commit(mctc); - send_global_virq(VIRQ_MCA); - } else if (++dumpcount >= 10) { - x86_mcinfo_dump((struct mc_info *)mctelem_dataptr(mctc)); - mctelem_dismiss(mctc); - } else { - mctelem_dismiss(mctc); - } - } else if (mctc != NULL) { - mctelem_dismiss(mctc); - } -} - -static void cf_check mce_work_fn(void *data) -{ - on_each_cpu(mce_checkregs, NULL, 1); - - if (variable_period) { - if (adjust) - period /= (adjust + 1); - else - period *= 2; - if (period > MCE_PERIOD_MAX) - period = MCE_PERIOD_MAX; - if (period < MCE_PERIOD_MIN) - period = MCE_PERIOD_MIN; - } - - set_timer(&mce_timer, NOW() + period); - adjust = 0; -} static int __init cf_check init_nonfatal_mce_checker(void) { @@ -106,13 +29,10 @@ static int __init cf_check init_nonfatal_mce_checker(void) /* Assume we are on K8 or newer AMD or Hygon CPU here */ amd_nonfatal_mcheck_init(c); break; - case X86_VENDOR_INTEL: - init_timer(&mce_timer, mce_work_fn, NULL, 0); - set_timer(&mce_timer, NOW() + MCE_PERIOD); + intel_nonfatal_mcheck_init(c); break; } - printk(KERN_INFO "mcheck_poll: Machine check polling timer started.\n"); return 0; }