diff mbox series

x86/hvm: Fix Misra Rule 19.1 regression

Message ID 20240410103721.593839-1-andrew.cooper3@citrix.com (mailing list archive)
State New
Headers show
Series x86/hvm: Fix Misra Rule 19.1 regression | expand

Commit Message

Andrew Cooper April 10, 2024, 10:37 a.m. UTC
Despite noticing an impending Rule 19.1 violation, the adjustment made (the
uint32_t cast) wasn't sufficient to avoid it.  Try again.

Fixes: 6a98383b0877 ("x86/HVM: clear upper halves of GPRs upon entry from 32-bit code")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: consulting@bugseng.com <consulting@bugseng.com>
CC: Roberto Bagnara <roberto.bagnara@bugseng.com>
CC: Federico Serafini <federico.serafini@bugseng.com>
CC: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
 xen/arch/x86/include/asm/hvm/hvm.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)


base-commit: f48299cad5c3c69fdc2c101517a6dab9c9827ea5

Comments

Andrew Cooper April 10, 2024, 12:13 p.m. UTC | #1
On 10/04/2024 11:37 am, Andrew Cooper wrote:
> Despite noticing an impending Rule 19.1 violation, the adjustment made (the
> uint32_t cast) wasn't sufficient to avoid it.  Try again.
>
> Fixes: 6a98383b0877 ("x86/HVM: clear upper halves of GPRs upon entry from 32-bit code")
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Subsequently noticed by Coverity too.  CIDs 15962{89..98}
Stefano Stabellini April 10, 2024, 10:13 p.m. UTC | #2
On Wed, 10 Apr 2024, Andrew Cooper wrote:
> Despite noticing an impending Rule 19.1 violation, the adjustment made (the
> uint32_t cast) wasn't sufficient to avoid it.  Try again.
> 
> Fixes: 6a98383b0877 ("x86/HVM: clear upper halves of GPRs upon entry from 32-bit code")
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Roger Pau Monné <roger.pau@citrix.com>
> CC: Stefano Stabellini <sstabellini@kernel.org>
> CC: consulting@bugseng.com <consulting@bugseng.com>
> CC: Roberto Bagnara <roberto.bagnara@bugseng.com>
> CC: Federico Serafini <federico.serafini@bugseng.com>
> CC: Nicola Vetrini <nicola.vetrini@bugseng.com>
> ---
>  xen/arch/x86/include/asm/hvm/hvm.h | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h
> index 595253babeaf..899233fb257b 100644
> --- a/xen/arch/x86/include/asm/hvm/hvm.h
> +++ b/xen/arch/x86/include/asm/hvm/hvm.h
> @@ -575,16 +575,16 @@ static inline void hvm_sanitize_regs_fields(struct cpu_user_regs *regs,
>      if ( compat )
>      {
>          /* Clear GPR upper halves, to counteract guests playing games. */
> -        regs->rbp = (uint32_t)regs->ebp;
> -        regs->rbx = (uint32_t)regs->ebx;
> -        regs->rax = (uint32_t)regs->eax;
> -        regs->rcx = (uint32_t)regs->ecx;
> -        regs->rdx = (uint32_t)regs->edx;
> -        regs->rsi = (uint32_t)regs->esi;
> -        regs->rdi = (uint32_t)regs->edi;
> -        regs->rip = (uint32_t)regs->eip;
> -        regs->rflags = (uint32_t)regs->eflags;
> -        regs->rsp = (uint32_t)regs->esp;
> +        regs->rbp = (uint32_t)regs->rbp;
> +        regs->rbx = (uint32_t)regs->rbx;
> +        regs->rax = (uint32_t)regs->rax;
> +        regs->rcx = (uint32_t)regs->rcx;
> +        regs->rdx = (uint32_t)regs->rdx;
> +        regs->rsi = (uint32_t)regs->rsi;
> +        regs->rdi = (uint32_t)regs->rdi;
> +        regs->rip = (uint32_t)regs->rip;
> +        regs->rflags = (uint32_t)regs->rflags;
> +        regs->rsp = (uint32_t)regs->rsp;
>      }
>  
>  #ifndef NDEBUG
> 
> base-commit: f48299cad5c3c69fdc2c101517a6dab9c9827ea5
> -- 
> 2.30.2
>
diff mbox series

Patch

diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h
index 595253babeaf..899233fb257b 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -575,16 +575,16 @@  static inline void hvm_sanitize_regs_fields(struct cpu_user_regs *regs,
     if ( compat )
     {
         /* Clear GPR upper halves, to counteract guests playing games. */
-        regs->rbp = (uint32_t)regs->ebp;
-        regs->rbx = (uint32_t)regs->ebx;
-        regs->rax = (uint32_t)regs->eax;
-        regs->rcx = (uint32_t)regs->ecx;
-        regs->rdx = (uint32_t)regs->edx;
-        regs->rsi = (uint32_t)regs->esi;
-        regs->rdi = (uint32_t)regs->edi;
-        regs->rip = (uint32_t)regs->eip;
-        regs->rflags = (uint32_t)regs->eflags;
-        regs->rsp = (uint32_t)regs->esp;
+        regs->rbp = (uint32_t)regs->rbp;
+        regs->rbx = (uint32_t)regs->rbx;
+        regs->rax = (uint32_t)regs->rax;
+        regs->rcx = (uint32_t)regs->rcx;
+        regs->rdx = (uint32_t)regs->rdx;
+        regs->rsi = (uint32_t)regs->rsi;
+        regs->rdi = (uint32_t)regs->rdi;
+        regs->rip = (uint32_t)regs->rip;
+        regs->rflags = (uint32_t)regs->rflags;
+        regs->rsp = (uint32_t)regs->rsp;
     }
 
 #ifndef NDEBUG