| Message ID | 20240524200338.1232391-5-andrew.cooper3@citrix.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | xen/bitops: Untangle ffs()/fls() infrastructure | expand |
On 24.05.2024 22:03, Andrew Cooper wrote: > This is in order to maintain bisectability through the subsequent changes, > where flsl() changes sign-ness non-atomically by architecture. > > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
On 27/05/2024 7:26 am, Jan Beulich wrote: > On 24.05.2024 22:03, Andrew Cooper wrote: >> This is in order to maintain bisectability through the subsequent changes, >> where flsl() changes sign-ness non-atomically by architecture. >> >> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> > Reviewed-by: Jan Beulich <jbeulich@suse.com> > > Actually, by coercing the min() in pvh_populate_memory_range() from patch 9 in this patch, the bisection-complexity of this series drops massively, and in particular I can merge patch 3 into 10. As you've given R-by on both, I'm going to go ahead and do this in order to make some headway on the series, given the deadlines, and that the RISC-V series is still pending this one. ~Andrew
On 29/05/2024 8:07 pm, Andrew Cooper wrote: > On 27/05/2024 7:26 am, Jan Beulich wrote: >> On 24.05.2024 22:03, Andrew Cooper wrote: >>> This is in order to maintain bisectability through the subsequent changes, >>> where flsl() changes sign-ness non-atomically by architecture. >>> >>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> >> Reviewed-by: Jan Beulich <jbeulich@suse.com> >> >> > Actually, by coercing the min() in pvh_populate_memory_range() from > patch 9 in this patch, the bisection-complexity of this series drops > massively, and in particular I can merge patch 3 into 10. > > As you've given R-by on both, I'm going to go ahead and do this in order > to make some headway on the series, given the deadlines, and that the > RISC-V series is still pending this one. Actually not quite. It's even more simple. This patch stays the same, and the coercion gets added as find_first_set_bit() turns into ffsl(). ~Andrew
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 7c1bdfc046bf..8d3342e95236 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1842,7 +1842,7 @@ static void _init_heap_pages(const struct page_info *pg, * Note that the value of ffsl() and flsl() starts from 1 so we need * to decrement it by 1. */ - unsigned int inc_order = min(MAX_ORDER, flsl(e - s) - 1); + unsigned int inc_order = min(MAX_ORDER + 0U, flsl(e - s) - 1U); if ( s ) inc_order = min(inc_order, ffsl(s) - 1U); @@ -2266,7 +2266,7 @@ void __init xenheap_max_mfn(unsigned long mfn) ASSERT(!first_node_initialised); ASSERT(!xenheap_bits); BUILD_BUG_ON((PADDR_BITS - PAGE_SHIFT) >= BITS_PER_LONG); - xenheap_bits = min(flsl(mfn + 1) - 1 + PAGE_SHIFT, PADDR_BITS); + xenheap_bits = min(flsl(mfn + 1) - 1U + PAGE_SHIFT, PADDR_BITS + 0U); printk(XENLOG_INFO "Xen heap: %u bits\n", xenheap_bits); }
This is in order to maintain bisectability through the subsequent changes, where flsl() changes sign-ness non-atomically by architecture. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> CC: Roger Pau Monné <roger.pau@citrix.com> CC: Wei Liu <wl@xen.org> CC: Stefano Stabellini <sstabellini@kernel.org> CC: Julien Grall <julien@xen.org> CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com> CC: Bertrand Marquis <bertrand.marquis@arm.com> CC: Michal Orzel <michal.orzel@amd.com> CC: Oleksii Kurochko <oleksii.kurochko@gmail.com> CC: Shawn Anastasio <sanastasio@raptorengineering.com> CC: consulting@bugseng.com <consulting@bugseng.com> CC: Simone Ballarin <simone.ballarin@bugseng.com> CC: Federico Serafini <federico.serafini@bugseng.com> CC: Nicola Vetrini <nicola.vetrini@bugseng.com> v2: * New --- xen/common/page_alloc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)