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pr=C From: Ayan Kumar Halder To: CC: Michal Orzel , Stefano Stabellini , Bertrand Marquis , "Ayan Kumar Halder" , Artem Mygaiev , Hisao Munakata Subject: [PATCH v2] docs: fusa: Add requirements for emulated uart Date: Tue, 17 Sep 2024 14:13:36 +0100 Message-ID: <20240917131336.3783112-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004687:EE_|DM6PR12MB4467:EE_ X-MS-Office365-Filtering-Correlation-Id: d0e94b0d-098a-44da-923d-08dcd71a931e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: f1jsttp2lxW0/KvmOcLZd4SM6Drw19l8Nevamks7rqh0dkJHFVWH0FeGXIqkcoLZZOM28dfHtEgth2PvJVA/M780K/nxT4+hjCT6OT0vgB35TlaMr36jyW6wqFya6nKfxVB3OD5pTrLIKKdYdRhXWfyKGYCuHA4bLub5t5WlRU2hYudvi4jn3Q44wNPIuIY/+rmHIWo6MBRug1rwzTOLXf5f0xJ/DUbGENCTsjIO0UJ8UOE+fFuQNxEujVgqhOqhfJYMtH/VPdqsc/q63uf6jHl22AGBOTUTSxkTPLa9ySC4CsFvzhozerVhtmRH7+WJtf8cESisbE3Uicv1iAjhzidM5hDyWi69nrur/nYmfu4RTK9rrixB91DK6EL8OFAGmqvzYNZIMo8/Gd3htByZGTQ+N9gr36Ef043MzwJM8b47lP5o49W5EgGSjlFn0rGPWYnZa9iQ+gBY0uDNAuOGnRNLhEoThHbgvEU1CJD+JnykNM05uSyUa0HB60m87lYCppDI5/9PSWuyoTcMc9JByFrizOik37nfF1/kC1wUMjB4oV985Kx1yCuPX7Iuqy0aFe4cxjzCwPWlWTPDWoS3+wwHPqlWBRXmHC9RluYnxjsEiP/hPCqhZr/u5JTD3hOUKGbnh14hx2r4iHijUyJovPeUY2St9mjS5732Yyee39AjKAfYRT2aAeJWcM/dWPxK93G6UaOJCjA512IC+vBrDPWCvPIDWQBzAJAzHjN8eLVLoSreVqcwqy1/XAulCZB2Jv518rHFdM4H1HYgrSKWCsxIb+HusO7nICBto+pfFC9CRkTQi7NDc86DQTSrS7hpzKa6yqxIUzs2OSrowuMJR1jvSdUtPhJNI26rdYXpJpctNifzxAVA8GpetfuVChBTiT79gg3yGp08o/vq6p7TKBZtcYoP2d2AZPDaQJnSXz6MWlcBksa7dJiEYVhCeOmNIdjmVdLf51ZTFvROUQCTDOwNRNU59kVCydf9ktc77uFHyGZJ9ejtH4wZeYu4Ia3ls4PWdQ91+OdgUlPm8pddT4K78oHdQkhWTyalEsFHTh/xSYXP4ztaok8oLlTpIBgZbjdOg0KEYQi5067qdS3kGzvaKQmtIR//wMFtgGwZ/ga0GmVahgmG1SEBGp5yRRer4O6wbFMDeCIOyM1w1JFLTUhoBOy7LCYEdLtv3HXtXNmmjhJQZkgJu9AmtThnAtggQJmSRXjDSNCY/tHWGQpiimztEKld21TtLOKiuUUXB8jvDgZClqCuTKe2cNQA4BtRaPAEXotPRMF+2GGdjau29+AMvf1PKbEMSkFRVl5kRokiAqrGoChr+upvnIVEu2EDEg+XtLy81vJjuZYs8uWjKbuOpRPocJ8fzF3uxRR+frl+HLGjGYOxr2m7dNQjy9otVCZC5H2YUWiuBGYOozxKpO7tbwuT8AajvqAHKidyCeqgso/CbVVJO8PJOnvYj6CG X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Sep 2024 13:13:51.4643 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d0e94b0d-098a-44da-923d-08dcd71a931e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004687.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4467 From: Michal Orzel Add the requirements for emulated SBSA UART. Signed-off-by: Michal Orzel Signed-off-by: Ayan Kumar Halder Reviewed-by: Bertrand Marquis --- Changes from :- v1 - 1. Reworded the requirements to remove any ambiguity. 2. Dopped the "virtualization unaware VMs" requirement as it is not easy to define "virtualization unaware". .../fusa/reqs/design-reqs/arm64/sbsa-uart.rst | 224 ++++++++++++++++++ docs/fusa/reqs/market-reqs/reqs.rst | 15 ++ docs/fusa/reqs/product-reqs/arm64/reqs.rst | 19 ++ 3 files changed, 258 insertions(+) create mode 100644 docs/fusa/reqs/design-reqs/arm64/sbsa-uart.rst diff --git a/docs/fusa/reqs/design-reqs/arm64/sbsa-uart.rst b/docs/fusa/reqs/design-reqs/arm64/sbsa-uart.rst new file mode 100644 index 0000000000..89598fa8a5 --- /dev/null +++ b/docs/fusa/reqs/design-reqs/arm64/sbsa-uart.rst @@ -0,0 +1,224 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +SBSA UART +========= + +The following are the requirements related to SBSA UART [1] emulated and +exposed by Xen to Arm64 domains. + +Probe the UART device tree node from a domain +--------------------------------------------- + +`XenSwdgn~arm64_uart_probe_dt~1` + +Description: +Xen shall generate a device tree node for the SBSA UART (in accordance to Arm +SBSA UART device tree binding [2]) in the domain device tree. + +Rationale: + +Comments: +Domains can detect the presence of the SBSA UART device tree node. + +Covers: + - `XenProd~emulated_uart~1` + +Transmit data in software polling mode +-------------------------------------- + +`XenSwdgn~arm64_uart_transmit_data_poll_mode~1` + +Description: +Xen shall support transmission of data in polling mode. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Transmit data in interrupt driven mode +-------------------------------------- + +`XenSwdgn~arm64_uart_transmit_data_interrupt_mode~1` + +Description: +Xen shall support transmission of data in interrupt driven mode. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Receive data in software polling mode +------------------------------------- + +`XenSwdgn~arm64_uart_receive_data_polling_mode~1` + +Description: +Xen shall support reception of data in polling mode. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Receive data in interrupt driven mode +------------------------------------- + +`XenSwdgn~arm64_uart_receive_data_interrupt_mode~1` + +Description: +Xen shall support reception of data in interrupt driven mode. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART data register +------------------------- + +`XenSwdgn~arm64_uart_access_data_register~1` + +Description: +Xen shall emulate the UARTDR register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART receive status register +----------------------------------- + +`XenSwdgn~arm64_uart_access_receive_status_register~1` + +Description: +Xen shall emulate the UARTRSR register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART flag register +------------------------- + +`XenSwdgn~arm64_uart_access_flag_register~1` + +Description: +Xen shall emulate the UARTFR register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART mask set/clear register +----------------------------------- + +`XenSwdgn~arm64_uart_access_mask_register~1` + +Description: +Xen shall emulate the UARTIMSC register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART raw interrupt status register +----------------------------------------- + +`XenSwdgn~arm64_uart_access_raw_interrupt_status_register~1` + +Description: +Xen shall emulate the UARTRIS register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART masked interrupt status register +-------------------------------------------- + +`XenSwdgn~arm64_uart_access_mask_irq_status_register~1` + +Description: +Xen shall emulate the UARTMIS register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Access UART interrupt clear register +------------------------------------ + +`XenSwdgn~arm64_uart_access_irq_clear_register~1` + +Description: +Xen shall emulate the UARTICR register. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Receive UART TX interrupt +------------------------- + +`XenSwdgn~arm64_uart_receive_tx_irq~1` + +Description: +Xen shall generate UART interrupt when the UART transmit interrupt condition is +met. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +Receive UART RX interrupt reception +----------------------------------- + +`XenSwdgn~arm64_uart_receive_rx_irq~1` + +Description: +Xen shall generate UART interrupt when the UART receive interrupt condition is +met. + +Rationale: + +Comments: + +Covers: + - `XenProd~emulated_uart~1` + +[1] Arm Base System Architecture, chapter B +[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt \ No newline at end of file diff --git a/docs/fusa/reqs/market-reqs/reqs.rst b/docs/fusa/reqs/market-reqs/reqs.rst index 9c98c84a9a..e98f348cf4 100644 --- a/docs/fusa/reqs/market-reqs/reqs.rst +++ b/docs/fusa/reqs/market-reqs/reqs.rst @@ -32,3 +32,18 @@ Comments: Needs: - XenProd + +Provide console to the VMs +-------------------------- + +`XenMkt~provide_console_vms~1` + +Description: +Xen shall provide a console to a VM. + +Rationale: + +Comments: + +Needs: + - XenProd \ No newline at end of file diff --git a/docs/fusa/reqs/product-reqs/arm64/reqs.rst b/docs/fusa/reqs/product-reqs/arm64/reqs.rst index 7aa3eeab6a..97e90813ec 100644 --- a/docs/fusa/reqs/product-reqs/arm64/reqs.rst +++ b/docs/fusa/reqs/product-reqs/arm64/reqs.rst @@ -21,3 +21,22 @@ Covers: Needs: - XenSwdgn + +Emulated UART +------------- + +`XenProd~emulated_uart~1` + +Description: +Xen shall provide an "Arm SBSA UART" compliant device to the domains. + +Rationale: + +Comments: + +Covers: + - `XenMkt~run_arm64_vms~1` + - `XenMkt~provide_console_vms~1` + +Needs: + - XenSwdgn \ No newline at end of file