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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Andrew Cooper , Jan Beulich , Julien Grall , Stefano Stabellini , "Bertrand Marquis" , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 4/4] xen/arm: mpu: Implement a dummy enable_secondary_cpu_mm Date: Wed, 18 Sep 2024 18:51:02 +0100 Message-ID: <20240918175102.223076-5-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240918175102.223076-1-ayan.kumar.halder@amd.com> References: <20240918175102.223076-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE4:EE_|LV2PR12MB5846:EE_ X-MS-Office365-Filtering-Correlation-Id: d9983e89-6efe-45c3-1737-08dcd80abea3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: +vwDf1+RV2vA+lyD7QmsTXsF2uDGYiS5fmB6MvbcPeLHPkGujCixq08oRH5pkJ8IiKX57ClddHUt1dfoUm6Q7L1+ofuYTZE4Me6XKReOVJb7FcGUUb/Mv4dUFuJztJOYa/cNf+C4WcF2MmMaLYaFA3HWR0P9YOmmrkoyKfCz4a42/s2xR2rZKq7J+0Veig/QAdbP51R0MA2dDFYbnYGudGg08BYLmsmChh3vrOq1XR0BfivhGr9tn8B/3LjEcq9qlTCl1z21HKigOWUN1Hnx55X3uH4Mwv9zfxErJ1QQ02Gy9xgUh665ek/OtMOJ8Z9OE3gnQJYBEERKDO4mZdi22H/DnmS+KgA2QprYygkXqpjIK598gHjDmvGpojX1M5PtEf9ZEPz98rqlmCuKdjAFqUoGZaZ4cNCxP6F/zkiF/JZ4q+0qFC4Ctrl2datAJxxgNVjc9ZdmkvL2CRBMyLuS73fnuGl+/Yo5rxyFglNiPTBaq3FrBexYMSs4lKigNbCFGpDTNoLYXL4N2TUcmuoMqa8IoeJ6pEoxvKNRPOMVL2zLtLUp1F9hGRP8BOZTLWaEYNiuvJA9AqTLUT7vAIbynZWUoezFpxg8REMh2AlRX/YwBGQcKEGy5JO7bZKboQWyZyjpKJ3ELoiuVnMa4DqDAOe5tAIe3WjosG+0fPjMlUGvWd1jd0EkpaX3PBnjvrVYp5EMbDZxey8GerDntpK8FJItB38qgHiUUfWz6ks92oQyEA+ksZQWxLAaOneAx+PLN0FwUobX19GBUI07u7O/xNpzio8/Fjyj+NV+YwcFo8cJ+TMSI5rMgDbxEB3sHmD5lMwjKp2v+fe02fw6hojsZ+gCdkSpnAurewIP0xW+sGktX/Z+1k47tcaH6zM3HMP5q/nOeIflhJ1nxNyw3S1dLWiwkc1bAu0ndHzlJ8/RUhkoq/uom85rToNRJDoJlzmJgStTZdbVXqAsE4Fa8i489yLtq/qVGenQhRA4qkZUhry4J1lhE1WIE97eBUTTjBvD4lwqckecCYQRjZMtYKDgEkSGMsMr1iEfQt6kBmdN8Uz3yXcnaAMKIkF9MUbtzXYsCN7Hslcy0D2fWrCBBiBCKlgWYSuj2oYeF5EWFt4Fn9xNwaO5rQf/8S7gbXI/d+oVhCo/RygrW3sZ/U2flIywPrrmM7iFd+hpMIT38jkVjoUyOEkJQZmRtYZ5SSzUeevo5xshGac37if/9U23HN9IUzQl8WKXYjtaN3nk3e7S/cefHXS/qcp/krMBXpOscna6bcMQwAf/XfH4XgiNykaApvm7c2TfhElyLIy3WW6y5PSw1T2e97H1VZ86oRE9c0E35UgLRedjc3+CpyZglwJb/04E5Qu11rsdhO0KtDMJzCacindNCESRyjmPZalWlbcbZ0eMAIevO17EiXJaNo18u+2T4Txzb+RewXazfwFe5MpV11o4rtnqcliDk1spNEAL X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 17:53:03.7993 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9983e89-6efe-45c3-1737-08dcd80abea3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5846 Secondary cpus initialization is not yet supported. Thus, we print an appropriate message and put the secondary cpus in WFE state. Signed-off-by: Ayan Kumar Halder --- Changes from :- v1 - 1. NR_CPUS is defined as 1 for MPU 2. Added a message in enable_secondary_cpu_mm() xen/arch/Kconfig | 1 + xen/arch/arm/arm64/mpu/head.S | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/xen/arch/Kconfig b/xen/arch/Kconfig index 308ce129a8..8640b7ec8b 100644 --- a/xen/arch/Kconfig +++ b/xen/arch/Kconfig @@ -11,6 +11,7 @@ config NR_CPUS default "8" if ARM && RCAR3 default "4" if ARM && QEMU default "4" if ARM && MPSOC + default "1" if ARM && MPU default "128" if ARM help Controls the build-time size of various arrays and bitmaps diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index ef55c8765c..3dfbbf8879 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -168,6 +168,16 @@ FUNC(enable_boot_cpu_mm) b 1b END(enable_boot_cpu_mm) +/* + * Secondary cpu has not yet been supported on MPU systems. We will block the + * secondary cpu bringup at this stage. + */ +ENTRY(enable_secondary_cpu_mm) +1: PRINT("- SMP not enabled yet -\r\n") + wfe + b 1b +ENDPROC(enable_secondary_cpu_mm) + /* * Local variables: * mode: ASM