From patchwork Fri Oct 25 10:06:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinjie Ruan X-Patchwork-Id: 13850413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F40A8D0C5FB for ; Fri, 25 Oct 2024 10:09:04 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.825848.1240245 (Exim 4.92) (envelope-from ) id 1t4HFZ-0003Lg-I2; Fri, 25 Oct 2024 10:08:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 825848.1240245; Fri, 25 Oct 2024 10:08:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t4HFZ-0003KH-4a; Fri, 25 Oct 2024 10:08:57 +0000 Received: by outflank-mailman (input) for mailman id 825848; Fri, 25 Oct 2024 10:08:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t4HFX-0000tn-Hr for xen-devel@lists.xenproject.org; Fri, 25 Oct 2024 10:08:55 +0000 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1f83c448-92b9-11ef-99a3-01e77a169b0f; Fri, 25 Oct 2024 12:08:52 +0200 (CEST) Received: from mail.maildlp.com (unknown [172.19.88.105]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4XZdjh6T3TzpX51; Fri, 25 Oct 2024 18:06:48 +0800 (CST) Received: from kwepemg200008.china.huawei.com (unknown [7.202.181.35]) by mail.maildlp.com (Postfix) with ESMTPS id 74D8E14011B; Fri, 25 Oct 2024 18:08:45 +0800 (CST) Received: from huawei.com (10.90.53.73) by kwepemg200008.china.huawei.com (7.202.181.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 25 Oct 2024 18:08:43 +0800 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1f83c448-92b9-11ef-99a3-01e77a169b0f From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH -next v4 09/19] arm64: entry: Use preempt_count() and need_resched() helper Date: Fri, 25 Oct 2024 18:06:50 +0800 Message-ID: <20241025100700.3714552-10-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025100700.3714552-1-ruanjinjie@huawei.com> References: <20241025100700.3714552-1-ruanjinjie@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.90.53.73] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemg200008.china.huawei.com (7.202.181.35) The "READ_ONCE(current_thread_info()->preempt_count = 0" is equivalent to "preempt_count() == 0 && need_resched()", so use these helpers to replace it, which will make it more clear when switch to generic entry. No functional changes. Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/entry-common.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index a3414fb599fa..3ea3ab32d232 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -74,14 +74,6 @@ static inline bool arm64_irqentry_exit_need_resched(void) if (!need_irq_preemption()) return false; - /* - * Note: thread_info::preempt_count includes both thread_info::count - * and thread_info::need_resched, and is not equivalent to - * preempt_count(). - */ - if (READ_ONCE(current_thread_info()->preempt_count) != 0) - return false; - /* * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC * priority masking is used the GIC irqchip driver will clear DAIF.IF @@ -129,8 +121,10 @@ static void noinstr exit_to_kernel_mode(struct pt_regs *regs, return; } - if (arm64_irqentry_exit_need_resched()) - preempt_schedule_irq(); + if (!preempt_count()) { + if (need_resched() && arm64_irqentry_exit_need_resched()) + preempt_schedule_irq(); + } trace_hardirqs_on(); } else {