@@ -202,7 +202,8 @@ static inline l4_pgentry_t l4e_from_paddr(paddr_t pa, unsigned int flags)
/* Check if an address is aligned for a given slot level. */
#define SLOT_IS_ALIGNED(v, m, s) \
- IS_ALIGNED(PFN_DOWN(v) | mfn_x(m), (1UL << ((s) - PAGE_SHIFT)) - 1)
+ IS_ALIGNED(PFN_DOWN(v) | (mfn_eq(m, INVALID_MFN) ? 0 : mfn_x(m)), \
+ (1UL << ((s) - PAGE_SHIFT)) - 1)
#define IS_L3E_ALIGNED(v, m) SLOT_IS_ALIGNED(v, m, L3_PAGETABLE_SHIFT)
#define IS_L2E_ALIGNED(v, m) SLOT_IS_ALIGNED(v, m, L2_PAGETABLE_SHIFT)
INVALID_MFN is ~0, so by it having all bits as 1s it doesn't fulfill the super-page address alignment checks for L3 and L2 entries. Special case INVALID_MFN so it's considered to be aligned for all slots. This fixes a regression introduced by 0b6b51a69f4d, where the switch from 0 to INVALID_MFN caused all super-pages to be shattered when attempting to remove mappings by passing INVALID_MFN instead of 0. Fixes: 0b6b51a69f4d ('xen/mm: Switch map_pages_to_xen to use MFN typesafe') Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> --- xen/arch/x86/include/asm/page.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)