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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v1 1/2] xen/mpu: Map early uart when earlyprintk on Date: Fri, 8 Nov 2024 20:00:24 +0000 Message-ID: <20241108200024.857766-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A104:EE_|PH7PR12MB5854:EE_ X-MS-Office365-Filtering-Correlation-Id: c9d9f930-15cb-41cb-cfd8-08dd00300164 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: UNRvq5qEqoJlAKyJNbd+Oio+MRlRZpwJ3HLmjUiC1iEX0cHbZld8uDNQAhsI1VqHJSdJmBeRHl3Wye1jFvdS6phWRJQjEXsOCaXmi6xAr/qUxTKiVgItO1wYae2gMmkdxSi59514EMmwkOTV7ze5IDFVY18qki39UqeU3fabf0wbhQfEZIFmDRtfnT9szppxoliqtl0gZ5TImo3MSu9vfnD48vlzT9cylrNYv/KresHAw8f+NvuRMRNwLJaugCsU9woQjbbwSpfJwKeahCK7w9lswWzoj2mYp5RpncP4ZYPkcWuYkiY20Mzbdf9dVDHSCb0gHT+QSB/J3mD8Gb+qtgvAVboN4cs3nttdCyaowvdHrdaokC4wb1iDiFej8UzGkWDuuwEtHDYCqk4zHDRVvu7ncJrwbEOxHn5Pks74U1luYJGhpSKc6UIdtEJlsMqaqXNtAQ49F51XaPvvClOK62qPiqbgZeGDSx4p/htd/O3ThY+mFVJqoUkzJsKJoGHO4FxbIam05m+OlgDioOMBErWkIqGMr6ETMvHCpJSj0kwAsrcHULekbWywSNPPdiArCyrVdyRUKf3dFJtX1EHDdL/7iphJDvstFNsci3oEc6IR+BNJB024tLzuyiERNWl79BoAvOzetI/1egtyvT5LjjeqFHqOzV7Y6DTZYk3mHe6TFXe5mDGsubzzOfsuGz151IXWCCme7NP4feQtos9FG2WvBAc5LWPsVw3oSi2HbxPO2cMHwByuZMG/G2x2GMl7pg9TEKvc8ylfqOv9v4FG+yAKX5jF8wZEbiqtYPu0Qahsmsm10XV9pjv+DEq/5WGRUTy8q4r5eYodOAFp6MQCIOrXc2QWDBZEQIFew9wXdgOcRzmAwxo784yHofiKjvuvFD6/gh1XHIyP6rlQ5NMZuUxDMFGjETd+CKYtPXASBUwGC/jEq7KquOytCWmSsKl6KNwUfCtJsqjBHDgSqaW5eVAqBkpxVPROCJWAsJaqBBTIF5wqI15vEHNYSVZ1jqoW5q8FNtnxlSReihybAxP4/v4+qqypLKUFa3VJVta+1tjpe+N5nMqV/iOX1T3Ydr0HFsLVkKY93mwMJR3Lgt6kcj7mtYUlYhdhzXx6jW0aEo4tWhnsyEBgsWAtuJj1+ff5HQZjr1nL59cA0M5ebQZJKUQ6z6RCqb8EJN1ObxOEtNzyv3w+7BBs7xr/rc8AUQ1I+X3NUAp9BHWsQgkRr6zx6YMOBqrrd2Vwx8YuFMWCAHTjozzmYjDZnkMBGDNTzeO944r3sZ5p47fH0gSQc9mrmrWM8c81dcWyvBTQF+bIUTMIxE3uJrGAbYw+CROblK2Abplnywl11od9lqJuO/Kjfmd8EXE4U/89ENysCs1w6rbG0LRT+ODLxfiONVXZ0LCzBo35fxTrVQHzFMn53nOp2w== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; 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Unlike MMU where we map a page in the virtual address space, here we need to know the exact physical size to be mapped. As VA == PA in case of MPU, the memory layout follows exactly the hardware configuration. As a consequence, we set EARLY_UART_VIRTUAL_ADDRESS as physical address. Further, we check whether user-defined EARLY_UART_SIZE is aligned to PAGE_SIZE (4KB). This is partly because we intend to map a minimum of 1 page(ie 4KB) and the limit address is set as "EARLY_UART_SIZE-1". The limit address needs to end with 0x3f (as required by PRLAR register). UART is mapped as nGnRE region (as specified by ATTR=100 , refer G1.3.13, MAIR_EL2, "---0100 Device memory nGnRE") and Doc ID - 102670_0101_02_en Table 4-3, Armv8 architecture memory types (nGnRE - Corresponds to Device in Armv7 architecture). Also, it is mapped as outer shareable, RW at EL2 only and execution of instructions from the region is not permitted. Signed-off-by: Ayan Kumar Halder Reviewed-by: Luca Fancellu --- xen/arch/arm/Kconfig.debug | 7 +++++++ xen/arch/arm/arm64/mpu/head.S | 9 +++++++++ xen/arch/arm/include/asm/early_printk.h | 19 +++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/xen/arch/arm/Kconfig.debug b/xen/arch/arm/Kconfig.debug index 7660e599c0..84a0616102 100644 --- a/xen/arch/arm/Kconfig.debug +++ b/xen/arch/arm/Kconfig.debug @@ -121,6 +121,13 @@ config EARLY_UART_BASE_ADDRESS hex "Early printk, physical base address of debug UART" range 0x0 0xffffffff if ARM_32 +config EARLY_UART_SIZE + depends on EARLY_PRINTK + depends on MPU + hex "Early printk, physical size of debug UART" + range 0x0 0xffffffff if ARM_32 + default 0x1000 + config EARLY_UART_PL011_BAUD_RATE depends on EARLY_UART_PL011 int "Early printk UART baud rate for pl011" diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index 731698aa3b..98422d7ed3 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -11,8 +11,10 @@ #define REGION_TEXT_PRBAR 0x38 /* SH=11 AP=10 XN=00 */ #define REGION_RO_PRBAR 0x3A /* SH=11 AP=10 XN=10 */ #define REGION_DATA_PRBAR 0x32 /* SH=11 AP=00 XN=10 */ +#define REGION_DEVICE_PRBAR 0x22 /* SH=10 AP=00 XN=10 */ #define REGION_NORMAL_PRLAR 0x0f /* NS=0 ATTR=111 EN=1 */ +#define REGION_DEVICE_PRLAR 0x09 /* NS=0 ATTR=100 EN=1 */ /* * Macro to prepare and set a EL2 MPU memory region. @@ -137,6 +139,13 @@ FUNC(enable_boot_cpu_mm) ldr x2, =__bss_end prepare_xen_region x0, x1, x2, x3, x4, x5 +#ifdef CONFIG_EARLY_PRINTK + /* Xen early UART section. */ + ldr x1, =CONFIG_EARLY_UART_BASE_ADDRESS + ldr x2, =(CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE) + prepare_xen_region x0, x1, x2, x3, x4, x5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR +#endif + b enable_mpu ret END(enable_boot_cpu_mm) diff --git a/xen/arch/arm/include/asm/early_printk.h b/xen/arch/arm/include/asm/early_printk.h index 46a5e562dd..98fd52c4db 100644 --- a/xen/arch/arm/include/asm/early_printk.h +++ b/xen/arch/arm/include/asm/early_printk.h @@ -15,6 +15,24 @@ #ifdef CONFIG_EARLY_PRINTK +#ifndef CONFIG_MMU + +/* + * For MPU systems, there is no VMSA support in EL2, so we use VA == PA + * for EARLY_UART_VIRTUAL_ADDRESS. + */ +#define EARLY_UART_VIRTUAL_ADDRESS CONFIG_EARLY_UART_BASE_ADDRESS + +/* + * User-defined EARLY_UART_SIZE must be aligned to a PAGE_SIZE, or + * we may map more than necessary in MPU system. + */ +#if (EARLY_UART_SIZE % PAGE_SIZE) != 0 +#error "EARLY_UART_SIZE must be aligned to PAGE_SIZE" +#endif + +#else + /* need to add the uart address offset in page to the fixmap address */ #define EARLY_UART_VIRTUAL_ADDRESS \ (FIXMAP_ADDR(FIX_CONSOLE) + (CONFIG_EARLY_UART_BASE_ADDRESS & ~PAGE_MASK)) @@ -22,6 +40,7 @@ #define TEMPORARY_EARLY_UART_VIRTUAL_ADDRESS \ (TEMPORARY_FIXMAP_ADDR(FIX_CONSOLE) + (CONFIG_EARLY_UART_BASE_ADDRESS & ~PAGE_MASK)) +#endif /* CONFIG_MMU */ #endif /* !CONFIG_EARLY_PRINTK */ #endif