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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6Rt9esRODwdhmRPre4CEkWV3Z2Y80I1RmtW4o743N6Y=; b=x5OHYmNobbJLOFpbnQaVriFfB8qQmhWjqt+mCWcyfKV/yXah5jUuOCyBWezVXMOuGNmXK/QOy/6Ys8zd2Agfrj4j0W71NsKLHdd9mvimxq+lsDOk6tkj6W7pln7kz2qylcLvUx90MZlV+g3ibsmmfFyF7uagQKo8J7hGLEmCLPg= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: CC: , , Penny Zheng , Andrew Cooper , "Anthony PERARD" , Michal Orzel , "Jan Beulich" , Julien Grall , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Stefano Stabellini" , Penny Zheng Subject: [PATCH v2 07/11] x86/cpufreq: add "cpufreq=amd-cppc,active" para Date: Thu, 6 Feb 2025 16:32:51 +0800 Message-ID: <20250206083255.1296363-8-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250206083255.1296363-1-Penny.Zheng@amd.com> References: <20250206083255.1296363-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004688:EE_|IA1PR12MB6188:EE_ X-MS-Office365-Filtering-Correlation-Id: 5d834f5c-fa6c-400f-75fd-08dd4688f345 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2025 08:33:36.6765 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d834f5c-fa6c-400f-75fd-08dd4688f345 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004688.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6188 From: Penny Zheng The amd-cppc driver may support multiple working modes, passive and active. Introduce `active` tag for users to explicitly select active mode and a new variable `opt_cpufreq_active` to keep track of which mode is currently enabled. Specific implementation will be introduced in the following commits. Signed-off-by: Penny Zheng --- v1 -> v2: - Remove pointless initializer - Move driver registration change to the next commit --- docs/misc/xen-command-line.pandoc | 8 +++++++- xen/arch/x86/acpi/cpufreq/amd-cppc.c | 9 +++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 78cfb8a02e..13f650270d 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin available support. ### cpufreq -> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]` +> `= none | {{ | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[active][,verbose]]` > Default: `xen` @@ -538,6 +538,12 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels. on supported AMD hardware to provide finer grained frequency control mechanism. The default is disabled. If `amd-cppc` is selected, but hardware support is not available, Xen will fallback to cpufreq=xen. +* `active` is a boolean to enable amd-cppc driver in active(autonomous) mode. + In this mode, users could provide a hint with energy performance preference + register to the hardware if they want to bias toward performance(0x0) or + energy efficiency(0xff), then CPPC power algorithm will calculate the runtime + workload and adjust the realtime cores frequency according to the power supply + and thermal, core voltage and some other hardware conditions. There is also support for `;`-separated fallback options: `cpufreq=hwp;xen,verbose`. This first tries `hwp` and falls back to `xen` if diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c index f14e7a6638..1742c57170 100644 --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c @@ -33,6 +33,8 @@ #define amd_cppc_warn(fmt, args...) \ printk(XENLOG_WARNING "AMD_CPPC: CPU%u warning: " fmt, cpu, ## args) +static bool __ro_after_init opt_cpufreq_active; + struct amd_cppc_drv_data { struct xen_processor_cppc *cppc_data; @@ -80,6 +82,13 @@ static bool __init amd_cppc_handle_option(const char *s, const char *end) return true; } + ret = parse_boolean("active", s, end); + if ( ret >= 0 ) + { + opt_cpufreq_active = ret; + return true; + } + return false; }