@@ -1133,6 +1133,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
static void xen_do_write_msr(unsigned int msr, unsigned int low,
unsigned int high, int *err)
{
+ u64 val;
+
switch (msr) {
case MSR_FS_BASE:
set_seg(SEGBASE_FS, low, high, err);
@@ -1159,7 +1161,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
break;
default:
- if (!pmu_msr_write(msr, low, high, err)) {
+ val = (u64)high << 32 | low;
+
+ if (!pmu_msr_write(msr, val)) {
if (err)
*err = native_write_msr_safe(msr, low, high);
else
@@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
return true;
}
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+bool pmu_msr_read(u32 msr, u64 *val, int *err)
{
bool emulated;
- if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
- return false;
-
- if (!emulated) {
- *val = err ? native_read_msr_safe(msr, err)
- : native_read_msr(msr);
- }
-
- return true;
+ return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
}
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+bool pmu_msr_write(u32 msr, u64 val)
{
- uint64_t val = ((uint64_t)high << 32) | low;
bool emulated;
- if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
- return false;
-
- if (!emulated) {
- if (err)
- *err = native_write_msr_safe(msr, low, high);
- else
- native_write_msr(msr, low, high);
- }
-
- return true;
+ return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
}
static unsigned long long xen_amd_read_pmc(int counter)
@@ -274,8 +274,8 @@ void xen_pmu_finish(int cpu);
static inline void xen_pmu_init(int cpu) {}
static inline void xen_pmu_finish(int cpu) {}
#endif
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
+bool pmu_msr_read(u32 msr, u64 *val, int *err);
+bool pmu_msr_write(u32 msr, u64 val);
int pmu_apic_update(uint32_t reg);
unsigned long long xen_read_pmc(int counter);