diff mbox series

[v3] x86/emulate: Remove HAVE_AS_RDRAND and HAVE_AS_RDSEED

Message ID 20250405012417.3108759-1-dmukhin@ford.com (mailing list archive)
State New
Headers show
Series [v3] x86/emulate: Remove HAVE_AS_RDRAND and HAVE_AS_RDSEED | expand

Commit Message

Denis Mukhin April 5, 2025, 1:25 a.m. UTC 
From: Denis Mukhin <dmukhin@ford.com>

The new toolchain baseline knows the rdrand/rdseed instructions,
no need to carry the workaround in the code.

Resolves: https://gitlab.com/xen-project/xen/-/work_items/208
Signed-off-by: Denis Mukhin <dmukhin@ford.com>
---
Changes since v2:
- updated arch_get_random()
- Link to v2: https://lore.kernel.org/xen-devel/20250403182250.3329498-6-dmukhin@ford.com/
---
 xen/arch/x86/arch.mk              |  2 --
 xen/arch/x86/include/asm/random.h |  2 +-
 xen/arch/x86/x86_emulate/0fc7.c   | 15 +++++----------
 3 files changed, 6 insertions(+), 13 deletions(-)

Comments

Andrew Cooper April 7, 2025, 9:17 a.m. UTC | #1 
On 05/04/2025 2:25 am, dmkhn@proton.me wrote:
> From: Denis Mukhin <dmukhin@ford.com>
>
> The new toolchain baseline knows the rdrand/rdseed instructions,
> no need to carry the workaround in the code.

A few minor notes.  Instructions in CAPITALS please to make them easier
to parse in context.  The comma ought to be a semi-colon.

You should note that arch_get_random() is adjusted too.

Also, it's useful to state "No functional change." to help reviewers. 
(Or to help archaeologies figure out the intent of the patch if they
subsequently find a bug in it.)

> diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/asm/random.h
> index 9e1fe0bc1d..e1c1c765e1 100644
> --- a/xen/arch/x86/include/asm/random.h
> +++ b/xen/arch/x86/include/asm/random.h
> @@ -8,7 +8,7 @@ static inline unsigned int arch_get_random(void)
>      unsigned int val = 0;
>  
>      if ( cpu_has(&current_cpu_data, X86_FEATURE_RDRAND) )
> -        asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
> +        asm volatile ( "rdrand %0" : "=a" (val) );

This was only tied to "a" because 0xf0 is the ModRM byte.  Now that we
can use the mnemonic, it can become "=r".

I've fixed all on commit.

~Andrew
Denis Mukhin April 7, 2025, 6:03 p.m. UTC | #2 
On Monday, April 7th, 2025 at 2:17 AM, Andrew Cooper <andrew.cooper3@citrix.com> wrote:

> 
> 
> On 05/04/2025 2:25 am, dmkhn@proton.me wrote:
> 
> > From: Denis Mukhin dmukhin@ford.com
> > 
> > The new toolchain baseline knows the rdrand/rdseed instructions,
> > no need to carry the workaround in the code.
> 
> 
> A few minor notes. Instructions in CAPITALS please to make them easier
> to parse in context. The comma ought to be a semi-colon.
> 
> You should note that arch_get_random() is adjusted too.
> 
> Also, it's useful to state "No functional change." to help reviewers.
> (Or to help archaeologies figure out the intent of the patch if they
> subsequently find a bug in it.)

Noted, thanks for the feedback

> 
> > diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/asm/random.h
> > index 9e1fe0bc1d..e1c1c765e1 100644
> > --- a/xen/arch/x86/include/asm/random.h
> > +++ b/xen/arch/x86/include/asm/random.h
> > @@ -8,7 +8,7 @@ static inline unsigned int arch_get_random(void)
> > unsigned int val = 0;
> > 
> > if ( cpu_has(&current_cpu_data, X86_FEATURE_RDRAND) )
> > - asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
> > + asm volatile ( "rdrand %0" : "=a" (val) );
> 
> 
> This was only tied to "a" because 0xf0 is the ModRM byte. Now that we
> can use the mnemonic, it can become "=r".
> 
> I've fixed all on commit.

Thank you!

> 
> ~Andrew
diff mbox series

Patch

diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
index 3bbaee2a44..5577bf6241 100644
--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -10,9 +10,7 @@  CFLAGS += -msoft-float
 
 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 $(call cc-option-add,CFLAGS,CC,-Wnested-externs)
-$(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND)
 $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT)
-$(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED)
 $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB)
 $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM)
 $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVDIR)
diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/asm/random.h
index 9e1fe0bc1d..e1c1c765e1 100644
--- a/xen/arch/x86/include/asm/random.h
+++ b/xen/arch/x86/include/asm/random.h
@@ -8,7 +8,7 @@  static inline unsigned int arch_get_random(void)
     unsigned int val = 0;
 
     if ( cpu_has(&current_cpu_data, X86_FEATURE_RDRAND) )
-        asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
+        asm volatile ( "rdrand %0" : "=a" (val) );
 
     return val;
 }
diff --git a/xen/arch/x86/x86_emulate/0fc7.c b/xen/arch/x86/x86_emulate/0fc7.c
index 5268d5cafd..58c8f79501 100644
--- a/xen/arch/x86/x86_emulate/0fc7.c
+++ b/xen/arch/x86/x86_emulate/0fc7.c
@@ -32,7 +32,6 @@  int x86emul_0fc7(struct x86_emulate_state *s,
             return X86EMUL_UNRECOGNIZED;
 
         case 6: /* rdrand */
-#ifdef HAVE_AS_RDRAND
             generate_exception_if(s->vex.pfx >= vex_f3, X86_EXC_UD);
             host_and_vcpu_must_have(rdrand);
             *dst = s->ea;
@@ -43,12 +42,12 @@  int x86emul_0fc7(struct x86_emulate_state *s,
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
             default:
-# ifdef __x86_64__
+#ifdef __x86_64__
                 asm ( "rdrand %k0" ASM_FLAG_OUT(, "; setc %1")
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
             case 8:
-# endif
+#endif
                 asm ( "rdrand %0" ASM_FLAG_OUT(, "; setc %1")
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
@@ -57,9 +56,6 @@  int x86emul_0fc7(struct x86_emulate_state *s,
             if ( carry )
                 regs->eflags |= X86_EFLAGS_CF;
             break;
-#else
-            return X86EMUL_UNIMPLEMENTED;
-#endif
 
         case 7: /* rdseed / rdpid */
             if ( s->vex.pfx == vex_f3 ) /* rdpid */
@@ -77,7 +73,7 @@  int x86emul_0fc7(struct x86_emulate_state *s,
                 dst->bytes = 4;
                 break;
             }
-#ifdef HAVE_AS_RDSEED
+
             generate_exception_if(s->vex.pfx >= vex_f3, X86_EXC_UD);
             host_and_vcpu_must_have(rdseed);
             *dst = s->ea;
@@ -88,12 +84,12 @@  int x86emul_0fc7(struct x86_emulate_state *s,
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
             default:
-# ifdef __x86_64__
+#ifdef __x86_64__
                 asm ( "rdseed %k0" ASM_FLAG_OUT(, "; setc %1")
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
             case 8:
-# endif
+#endif
                 asm ( "rdseed %0" ASM_FLAG_OUT(, "; setc %1")
                       : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) );
                 break;
@@ -102,7 +98,6 @@  int x86emul_0fc7(struct x86_emulate_state *s,
             if ( carry )
                 regs->eflags |= X86_EFLAGS_CF;
             break;
-#endif
         }
     }
     else