@@ -57,7 +57,6 @@ bool __initdata amd_virt_spec_ctrl;
static bool __read_mostly fam17_c6_disabled;
static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value);
-#define INVAL_FREQ_MHZ ~(uint64_t)0
static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
unsigned int *hi)
@@ -596,14 +595,13 @@ static uint64_t amd_parse_freq(unsigned char c, uint64_t value)
return freq;
}
-void amd_log_freq(const struct cpuinfo_x86 *c)
+void amd_process_freq(const struct cpuinfo_x86 *c,
+ uint64_t *low_mhz, uint64_t *nom_mhz, uint64_t *hi_mhz)
{
unsigned int idx = 0, h;
uint64_t hi, lo, val;
- if (c->x86 < 0x10 || c->x86 > 0x1A ||
- (c != &boot_cpu_data &&
- (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1)))))
+ if (c->x86 < 0x10 || c->x86 > 0x1A)
return;
if (c->x86 < 0x17) {
@@ -684,20 +682,21 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
if (idx && idx < h &&
!rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) &&
- !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
- printk("CPU%u: %lu (%lu ... %lu) MHz\n",
- smp_processor_id(),
- amd_parse_freq(c->x86, val),
- amd_parse_freq(c->x86, lo),
- amd_parse_freq(c->x86, hi));
- else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
- printk("CPU%u: %lu ... %lu MHz\n",
- smp_processor_id(),
- amd_parse_freq(c->x86, lo),
- amd_parse_freq(c->x86, hi));
- else
- printk("CPU%u: %lu MHz\n", smp_processor_id(),
- amd_parse_freq(c->x86, lo));
+ !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
+ if (nom_mhz)
+ *nom_mhz = amd_parse_freq(c->x86, val);
+ if (low_mhz)
+ *low_mhz = amd_parse_freq(c->x86, lo);
+ if (hi_mhz)
+ *hi_mhz = amd_parse_freq(c->x86, hi);
+ } else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
+ if (low_mhz)
+ *low_mhz = amd_parse_freq(c->x86, lo);
+ if (hi_mhz)
+ *hi_mhz = amd_parse_freq(c->x86, hi);
+ } else
+ if (low_mhz)
+ *low_mhz = amd_parse_freq(c->x86, lo);
}
void cf_check early_init_amd(struct cpuinfo_x86 *c)
@@ -708,6 +707,29 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c)
ctxt_switch_levelling(NULL);
}
+void amd_log_freq(const struct cpuinfo_x86 *c)
+{
+ uint64_t low_mhz, nom_mhz, hi_mhz;
+
+ if (c != &boot_cpu_data &&
+ (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1))))
+ return;
+
+ low_mhz = nom_mhz = hi_mhz = INVAL_FREQ_MHZ;
+ amd_process_freq(c, &low_mhz, &nom_mhz, &hi_mhz);
+
+ if (low_mhz != INVAL_FREQ_MHZ && nom_mhz != INVAL_FREQ_MHZ &&
+ hi_mhz != INVAL_FREQ_MHZ)
+ printk("CPU%u: %lu (%lu ... %lu) MHz\n",
+ smp_processor_id(),
+ low_mhz, nom_mhz, hi_mhz);
+ else if (low_mhz != INVAL_FREQ_MHZ && hi_mhz != INVAL_FREQ_MHZ)
+ printk("CPU%u: %lu ... %lu MHz\n",
+ smp_processor_id(), low_mhz, hi_mhz);
+ else if (low_mhz != INVAL_FREQ_MHZ)
+ printk("CPU%u: %lu MHz\n", smp_processor_id(), low_mhz);
+}
+
void amd_init_lfence(struct cpuinfo_x86 *c)
{
uint64_t value;
@@ -174,4 +174,8 @@ bool amd_setup_legacy_ssbd(void);
void amd_set_legacy_ssbd(bool enable);
void amd_set_cpuid_user_dis(bool enable);
+#define INVAL_FREQ_MHZ ~(uint64_t)0
+void amd_process_freq(const struct cpuinfo_x86 *c, uint64_t *low_mhz,
+ uint64_t *nom_mhz, uint64_t *hi_mhz);
+
#endif /* __AMD_H__ */
When _CPC table could not provide processor frequency range values for Xen governor, we need to read processor max frequency as anchor point. So we extract amd cpu core frequency calculation logic from amd_log_freq(), and wrap it as a new helper amd_process_freq(). Signed-off-by: Penny Zheng <Penny.Zheng@amd.com> --- v1 -> v2: - new commit --- v3 -> v4 - introduce amd_process_freq() --- xen/arch/x86/cpu/amd.c | 60 +++++++++++++++++++++++----------- xen/arch/x86/include/asm/amd.h | 4 +++ 2 files changed, 45 insertions(+), 19 deletions(-)