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Implement this by not resettting xhc_cf8 again in xue_init_xhc(), but using a value found there if non-zero. Additionally, add xue->xhc_num to select n-th controller. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Jan Beulich --- Changes in v2: - unsigned int xhc_num - code style --- docs/misc/xen-command-line.pandoc | 2 +- xen/drivers/char/xue.c | 53 ++++++++++++++++++++++++-------- 2 files changed, 42 insertions(+), 13 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index f9fa857bd84e..1ab92bf7b50a 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -721,7 +721,7 @@ Available alternatives, with their meaning, are: ### dbgp > `= ehci[ | @pci:. ]` -> `= xue` +> `= xue[ | @pci:. ]` Specify the USB controller to use, either by instance number (when going over the PCI busses sequentially) or by PCI device (must be on segment 0). diff --git a/xen/drivers/char/xue.c b/xen/drivers/char/xue.c index 2cbbaea11fa0..9d48068a5fba 100644 --- a/xen/drivers/char/xue.c +++ b/xen/drivers/char/xue.c @@ -205,6 +205,7 @@ struct xue { void *xhc_mmio; int open; + unsigned int xhc_num; /* look for n-th xhc */ }; static void xue_sys_pause(void) @@ -238,24 +239,35 @@ static bool __init xue_init_xhc(struct xue *xue) uint64_t bar1; uint64_t devfn; - /* - * Search PCI bus 0 for the xHC. All the host controllers supported so far - * are part of the chipset and are on bus 0. - */ - for ( devfn = 0; devfn < 256; devfn++ ) + if ( xue->sbdf.sbdf == 0 ) { - pci_sbdf_t sbdf = PCI_SBDF(0, 0, devfn); - uint32_t hdr = pci_conf_read8(sbdf, PCI_HEADER_TYPE); - - if ( hdr == 0 || hdr == 0x80 ) + /* + * Search PCI bus 0 for the xHC. All the host controllers supported so far + * are part of the chipset and are on bus 0. + */ + for ( devfn = 0; devfn < 256; devfn++ ) { - if ( (pci_conf_read32(sbdf, PCI_CLASS_REVISION) >> 8) == XUE_XHC_CLASSC ) + pci_sbdf_t sbdf = PCI_SBDF(0, 0, devfn); + uint32_t hdr = pci_conf_read8(sbdf, PCI_HEADER_TYPE); + + if ( hdr == 0 || hdr == 0x80 ) { - xue->sbdf = sbdf; - break; + if ( (pci_conf_read32(sbdf, PCI_CLASS_REVISION) >> 8) == XUE_XHC_CLASSC ) + { + if ( xue->xhc_num-- ) + continue; + xue->sbdf = sbdf; + break; + } } } } + else + { + /* Verify if selected device is really xHC */ + if ( (pci_conf_read32(xue->sbdf, PCI_CLASS_REVISION) >> 8) != XUE_XHC_CLASSC ) + xue->sbdf.sbdf = 0; + } if ( !xue->sbdf.sbdf ) { @@ -955,12 +967,29 @@ void __init xue_uart_init(void) { struct xue_uart *uart = &xue_uart; struct xue *xue = &uart->xue; + const char *e; if ( strncmp(opt_dbgp, "xue", 3) ) return; memset(xue, 0, sizeof(*xue)); + if ( isdigit(opt_dbgp[3]) || !opt_dbgp[3] ) + { + if ( opt_dbgp[3] ) + xue->xhc_num = simple_strtoul(opt_dbgp + 3, &e, 10); + } + else if ( strncmp(opt_dbgp + 3, "@pci", 4) == 0 ) + { + unsigned int bus, slot, func; + + e = parse_pci(opt_dbgp + 7, NULL, &bus, &slot, &func); + if ( !e || *e ) + return; + + xue->sbdf = PCI_SBDF(0, bus, slot, func); + } + xue->dbc_ctx = &ctx; xue->dbc_erst = &erst; xue->dbc_ering.trb = evt_trb;