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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?noJTBd12bDmmRq7pSzNJgSSnlU2v?= =?utf-8?q?Imc0Ob1Z7cpoegawSm8nAdD/CgJDRYciBj9UlfWWjZ48FeTWl/LzCE3tUV7KY8vkV?= =?utf-8?q?iQJfVpXOLIKCsZOkxgkI14ruJSxInukQO2+SBnzHXZ/rcOrk3Y6oZCFsBxW3r/yrl?= =?utf-8?q?1i8iHyE2Xx+ggsJEKLIJ+Tc5Ri+CD7Bh9IzR0TVSgQ2XCQlA95gaatxwhRKX63Qf2?= =?utf-8?q?AIrpi46whXUeqrxzVZ8tRIeF3UaPJvVCiaoVV3NJoCumhFqaC79BqTpB8Y5z/Cc/G?= =?utf-8?q?Ooc8utyR37zO59lmbScBrSAArlNJI0JZYabYGDdz1wkM8ixW9v6f2UdYkMolXXdZE?= =?utf-8?q?gw2trvuhv6Jmu2I2LN6+UXguDVM278KvCiEdhxr3XxlZaWWEDNK+4eKv0RvS7jO+q?= =?utf-8?q?Wn3By+beRMW+ZrPmjkerJxHCcLr7UBlwHNxu12VWQK0H6T4WFbW/9tVUUpLztLaKp?= =?utf-8?q?NB+zQ7gUSUF7+P7aTmb5gKmlnMrPEOlK1Kp5X0ChPfrQptZbdgo/0+CSgOrDQTonu?= =?utf-8?q?EeVds5qJ6yBwNYD4TSjD+sF1etVxuAE+AkYoKNNOXsle1tdp9zv9uHhKQ9LL0KzUC?= =?utf-8?q?jYKpltiD5QnB0RT8UV6Hv8JLP84H48zKmV5HtN0a4OCZ9hygpb9/AoZMb/zNFC2Nb?= =?utf-8?q?WpbxPOjypl5dLk98CKbBUZDkYCFzXtAnGWNq9drBel3KbltfC1RxRsJ51+lT4sCpU?= =?utf-8?q?8048VtJR1D/51SbwWuL/GFjKXPHfS4CPsIe1So9XSiqeHn8QCOif0P0GnnSM+4OS1?= =?utf-8?q?O12N/1o+OFPyhTHI7yptg0WIjS/SpYm/RTWT81VNQQ3Abv05qdgsDjgaEOXngmw23?= =?utf-8?q?+suhC89IIC0EKSH+v/DY7DYQvocdMyuofP3k2eJcTHaLUmd2kRkcaYsMfvMiv9zWe?= =?utf-8?q?Qk0Fmf2u5vz6mESJRk/OSxRA06+vMshZ9FP9VVVH4y+Y7zrqmu5f303X3+ljxbzwu?= =?utf-8?q?d08/qSRerGhR5E/KpNb4/OKXENVNlz00r1W1DzJhzCVqeZvYN6MjyAlnTe5gLkwah?= =?utf-8?q?8U8dSC+Dpc86+uTkGSWJay7qtUJF02zVubRBUEh18WboFUv9293VkiY5LRHocusV/?= =?utf-8?q?e/2/IpRav7aC1rApmlKHZQ8IO/T70g1X7Q4L6JtLOe/4cRbWoWhE0LjWwnxhkKgjl?= =?utf-8?q?nkiOC2KZFXHyfEctElWpk+l9ia/jjt3pxMkvmbu7KO4oLT9lJaeyLEd/OR7ORj+q4?= =?utf-8?q?0CZNGqvgqen3/s9tbTPTNuMSwBRwhaol5aSwIoTrqTXECWTDys0DSTMdkhsDkp0tU?= =?utf-8?q?JYtGtw6C+DYS/rBX?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 73ce02b5-3dfc-46f0-8df6-08d9670a9b42 X-MS-Exchange-CrossTenant-AuthSource: AM0PR04MB5587.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2021 14:22:30.2809 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: P5FO5k9kw9BodPkSGAFMIW1l+nrDOxvRb7GeDG0jxkbbBWmIL9ib1+KZl2NP4ktgbHzh0u1S8AbRo0Y4zUuxnQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB7841 For vendor specific code to support superpages we need to be able to deal with a superpage mapping replacing an intermediate page table (or hierarchy thereof). Consequently an iommu_alloc_pgtable() counterpart is needed to free individual page tables while a domain is still alive. Since the freeing needs to be deferred until after a suitable IOTLB flush was performed, released page tables get queued for processing by a tasklet. Signed-off-by: Jan Beulich --- I was considering whether to use a softirq-taklet instead. This would have the benefit of avoiding extra scheduling operations, but come with the risk of the freeing happening prematurely because of a process_pending_softirqs() somewhere. --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -12,6 +12,7 @@ * this program; If not, see . */ +#include #include #include #include @@ -363,6 +364,85 @@ struct page_info *iommu_alloc_pgtable(st return pg; } +/* + * Intermediate page tables which get replaced by large pages may only be + * freed after a suitable IOTLB flush. Hence such pages get queued on a + * per-CPU list, with a per-CPU tasklet processing the list on the assumption + * that the necessary IOTLB flush will have occurred by the time tasklets get + * to run. (List and tasklet being per-CPU has the benefit of accesses not + * requiring any locking.) + */ +static DEFINE_PER_CPU(struct page_list_head, free_pgt_list); +static DEFINE_PER_CPU(struct tasklet, free_pgt_tasklet); + +static void free_queued_pgtables(void *arg) +{ + struct page_list_head *list = arg; + struct page_info *pg; + + while ( (pg = page_list_remove_head(list)) ) + free_domheap_page(pg); +} + +void iommu_queue_free_pgtable(struct domain *d, struct page_info *pg) +{ + struct domain_iommu *hd = dom_iommu(d); + unsigned int cpu = smp_processor_id(); + + spin_lock(&hd->arch.pgtables.lock); + page_list_del(pg, &hd->arch.pgtables.list); + spin_unlock(&hd->arch.pgtables.lock); + + page_list_add_tail(pg, &per_cpu(free_pgt_list, cpu)); + + tasklet_schedule(&per_cpu(free_pgt_tasklet, cpu)); +} + +static int cpu_callback( + struct notifier_block *nfb, unsigned long action, void *hcpu) +{ + unsigned int cpu = (unsigned long)hcpu; + struct page_list_head *list = &per_cpu(free_pgt_list, cpu); + struct tasklet *tasklet = &per_cpu(free_pgt_tasklet, cpu); + + switch ( action ) + { + case CPU_DOWN_PREPARE: + tasklet_kill(tasklet); + break; + + case CPU_DEAD: + page_list_splice(list, &this_cpu(free_pgt_list)); + INIT_PAGE_LIST_HEAD(list); + tasklet_schedule(&this_cpu(free_pgt_tasklet)); + break; + + case CPU_UP_PREPARE: + case CPU_DOWN_FAILED: + tasklet_init(tasklet, free_queued_pgtables, list); + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block cpu_nfb = { + .notifier_call = cpu_callback, +}; + +static int __init bsp_init(void) +{ + if ( iommu_enabled ) + { + cpu_callback(&cpu_nfb, CPU_UP_PREPARE, + (void *)(unsigned long)smp_processor_id()); + register_cpu_notifier(&cpu_nfb); + } + + return 0; +} +presmp_initcall(bsp_init); + bool arch_iommu_use_permitted(const struct domain *d) { /* --- a/xen/include/asm-x86/iommu.h +++ b/xen/include/asm-x86/iommu.h @@ -136,6 +136,7 @@ int pi_update_irte(const struct pi_desc int __must_check iommu_free_pgtables(struct domain *d); struct page_info *__must_check iommu_alloc_pgtable(struct domain *d); +void iommu_queue_free_pgtable(struct domain *d, struct page_info *pg); #endif /* !__ARCH_X86_IOMMU_H__ */ /*