diff mbox series

[v8,2/2] xen: Add files needed for minimal riscv build

Message ID 4337d3cd6891b34f534d85ca62712bd3b446edf8.1622772299.git.connojdavis@gmail.com (mailing list archive)
State New
Headers show
Series Minimal build for RISCV | expand

Commit Message

Connor Davis June 4, 2021, 2:14 a.m. UTC
Add arch-specific makefiles and configs needed to build for
riscv. Also add a minimal head.S that is a simple infinite loop.
head.o can be built with

$ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen tiny64_defconfig
$ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen TARGET=riscv64/head.o

No other TARGET is supported at the moment.

Signed-off-by: Connor Davis <connojdavis@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 MAINTAINERS                             |  9 +++++
 config/riscv64.mk                       |  5 +++
 xen/Makefile                            |  8 +++--
 xen/arch/riscv/Kconfig                  | 48 +++++++++++++++++++++++++
 xen/arch/riscv/Kconfig.debug            |  0
 xen/arch/riscv/Makefile                 |  2 ++
 xen/arch/riscv/Rules.mk                 |  0
 xen/arch/riscv/arch.mk                  | 14 ++++++++
 xen/arch/riscv/configs/tiny64_defconfig | 13 +++++++
 xen/arch/riscv/riscv64/asm-offsets.c    |  0
 xen/arch/riscv/riscv64/head.S           |  6 ++++
 xen/include/asm-riscv/config.h          | 47 ++++++++++++++++++++++++
 12 files changed, 150 insertions(+), 2 deletions(-)
 create mode 100644 config/riscv64.mk
 create mode 100644 xen/arch/riscv/Kconfig
 create mode 100644 xen/arch/riscv/Kconfig.debug
 create mode 100644 xen/arch/riscv/Makefile
 create mode 100644 xen/arch/riscv/Rules.mk
 create mode 100644 xen/arch/riscv/arch.mk
 create mode 100644 xen/arch/riscv/configs/tiny64_defconfig
 create mode 100644 xen/arch/riscv/riscv64/asm-offsets.c
 create mode 100644 xen/arch/riscv/riscv64/head.S
 create mode 100644 xen/include/asm-riscv/config.h

Comments

Jan Beulich June 8, 2021, 10:44 a.m. UTC | #1
On 04.06.2021 04:14, Connor Davis wrote:
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -456,6 +456,15 @@ F:	tools/libs/light/libxl_nonetbuffer.c
>  F:	tools/hotplug/Linux/remus-netbuf-setup
>  F:	tools/hotplug/Linux/block-drbd-probe
>  
> +RISCV
> +M:	Bob Eshleman <bobbyeshleman@gmail.com>
> +M:	Alistair Francis <alistair.francis@wdc.com>
> +R:	Connor Davis <connojdavis@gmail.com>
> +S:	Supported
> +F:	config/riscv64.mk
> +F:	xen/arch/riscv/
> +F:	xen/include/asm-riscv/
> +
>  RTDS SCHEDULER
>  M:	Dario Faggioli <dfaggioli@suse.com>
>  M:	Meng Xu <mengxu@cis.upenn.edu>

FAOD as per Julien's request for this to be formally complete, I'm waiting
for Bob's ack in order to put in this one (together with patch 1, as I did
indicate before).

Jan
Bob Eshleman June 8, 2021, 7:08 p.m. UTC | #2
On 6/3/21 7:14 PM, Connor Davis wrote:
> Add arch-specific makefiles and configs needed to build for
> riscv. Also add a minimal head.S that is a simple infinite loop.
> head.o can be built with
> 
> $ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen tiny64_defconfig
> $ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen TARGET=riscv64/head.o
> 
> No other TARGET is supported at the moment.
> 
> Signed-off-by: Connor Davis <connojdavis@gmail.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  MAINTAINERS                             |  9 +++++
>  config/riscv64.mk                       |  5 +++
>  xen/Makefile                            |  8 +++--
>  xen/arch/riscv/Kconfig                  | 48 +++++++++++++++++++++++++
>  xen/arch/riscv/Kconfig.debug            |  0
>  xen/arch/riscv/Makefile                 |  2 ++
>  xen/arch/riscv/Rules.mk                 |  0
>  xen/arch/riscv/arch.mk                  | 14 ++++++++
>  xen/arch/riscv/configs/tiny64_defconfig | 13 +++++++
>  xen/arch/riscv/riscv64/asm-offsets.c    |  0
>  xen/arch/riscv/riscv64/head.S           |  6 ++++
>  xen/include/asm-riscv/config.h          | 47 ++++++++++++++++++++++++
>  12 files changed, 150 insertions(+), 2 deletions(-)
>  create mode 100644 config/riscv64.mk
>  create mode 100644 xen/arch/riscv/Kconfig
>  create mode 100644 xen/arch/riscv/Kconfig.debug
>  create mode 100644 xen/arch/riscv/Makefile
>  create mode 100644 xen/arch/riscv/Rules.mk
>  create mode 100644 xen/arch/riscv/arch.mk
>  create mode 100644 xen/arch/riscv/configs/tiny64_defconfig
>  create mode 100644 xen/arch/riscv/riscv64/asm-offsets.c
>  create mode 100644 xen/arch/riscv/riscv64/head.S
>  create mode 100644 xen/include/asm-riscv/config.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d46b08a0d2..5a1f92422a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -456,6 +456,15 @@ F:	tools/libs/light/libxl_nonetbuffer.c
>  F:	tools/hotplug/Linux/remus-netbuf-setup
>  F:	tools/hotplug/Linux/block-drbd-probe
>  
> +RISCV
> +M:	Bob Eshleman <bobbyeshleman@gmail.com>
> +M:	Alistair Francis <alistair.francis@wdc.com>
> +R:	Connor Davis <connojdavis@gmail.com>
> +S:	Supported
> +F:	config/riscv64.mk
> +F:	xen/arch/riscv/
> +F:	xen/include/asm-riscv/
> +
>  RTDS SCHEDULER
>  M:	Dario Faggioli <dfaggioli@suse.com>
>  M:	Meng Xu <mengxu@cis.upenn.edu>
> diff --git a/config/riscv64.mk b/config/riscv64.mk
> new file mode 100644
> index 0000000000..a5a21e5fa2
> --- /dev/null
> +++ b/config/riscv64.mk
> @@ -0,0 +1,5 @@
> +CONFIG_RISCV := y
> +CONFIG_RISCV_64 := y
> +CONFIG_RISCV_$(XEN_OS) := y
> +
> +CONFIG_XEN_INSTALL_SUFFIX :=
> diff --git a/xen/Makefile b/xen/Makefile
> index 7ce7692354..89879fad4c 100644
> --- a/xen/Makefile
> +++ b/xen/Makefile
> @@ -26,7 +26,9 @@ MAKEFLAGS += -rR
>  EFI_MOUNTPOINT ?= $(BOOT_DIR)/efi
>  
>  ARCH=$(XEN_TARGET_ARCH)
> -SRCARCH=$(shell echo $(ARCH) | sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g')
> +SRCARCH=$(shell echo $(ARCH) | \
> +          sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
> +              -e s'/riscv.*/riscv/g')
>  
>  # Don't break if the build process wasn't called from the top level
>  # we need XEN_TARGET_ARCH to generate the proper config
> @@ -35,7 +37,8 @@ include $(XEN_ROOT)/Config.mk
>  # Set ARCH/SUBARCH appropriately.
>  export TARGET_SUBARCH  := $(XEN_TARGET_ARCH)
>  export TARGET_ARCH     := $(shell echo $(XEN_TARGET_ARCH) | \
> -                            sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g')
> +                            sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
> +                                -e s'/riscv.*/riscv/g')
>  
>  # Allow someone to change their config file
>  export KCONFIG_CONFIG ?= .config
> @@ -335,6 +338,7 @@ _clean: delete-unfresh-files
>  	$(MAKE) $(clean) xsm
>  	$(MAKE) $(clean) crypto
>  	$(MAKE) $(clean) arch/arm
> +	$(MAKE) $(clean) arch/riscv
>  	$(MAKE) $(clean) arch/x86
>  	$(MAKE) $(clean) test
>  	$(MAKE) -f $(BASEDIR)/tools/kconfig/Makefile.kconfig ARCH=$(ARCH) SRCARCH=$(SRCARCH) clean
> diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
> new file mode 100644
> index 0000000000..468e250c86
> --- /dev/null
> +++ b/xen/arch/riscv/Kconfig
> @@ -0,0 +1,48 @@
> +config RISCV
> +	def_bool y
> +
> +config RISCV_64
> +	def_bool y
> +	select 64BIT
> +
> +config ARCH_DEFCONFIG
> +	string
> +	default "arch/riscv/configs/tiny64_defconfig"
> +
> +menu "Architecture Features"
> +
> +source "arch/Kconfig"
> +
> +endmenu
> +
> +menu "ISA Selection"
> +
> +choice
> +	prompt "Base ISA"
> +	default RISCV_ISA_RV64IMA if RISCV_64
> +	help
> +	  This selects the base ISA extensions that Xen will target.
> +
> +config RISCV_ISA_RV64IMA
> +	bool "RV64IMA"
> +	help
> +	  Use the RV64I base ISA, plus the "M" and "A" extensions
> +	  for integer multiply/divide and atomic instructions, respectively.
> +
> +endchoice
> +
> +config RISCV_ISA_C
> +	bool "Compressed extension"
> +	default y
> +	help
> +	  Add "C" to the ISA subsets that the toolchain is allowed to
> +	  emit when building Xen, which results in compressed instructions
> +	  in the Xen binary.
> +
> +	  If unsure, say Y.
> +
> +endmenu
> +
> +source "common/Kconfig"
> +
> +source "drivers/Kconfig"
> diff --git a/xen/arch/riscv/Kconfig.debug b/xen/arch/riscv/Kconfig.debug
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
> new file mode 100644
> index 0000000000..942e4ffbc1
> --- /dev/null
> +++ b/xen/arch/riscv/Makefile
> @@ -0,0 +1,2 @@
> +.PHONY: include
> +include:
> diff --git a/xen/arch/riscv/Rules.mk b/xen/arch/riscv/Rules.mk
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk
> new file mode 100644
> index 0000000000..53dadb8975
> --- /dev/null
> +++ b/xen/arch/riscv/arch.mk
> @@ -0,0 +1,14 @@
> +########################################
> +# RISCV-specific definitions
> +
> +CFLAGS-$(CONFIG_RISCV_64) += -mabi=lp64
> +
> +riscv-march-$(CONFIG_RISCV_ISA_RV64IMA) := rv64ima
> +riscv-march-$(CONFIG_RISCV_ISA_C)       := $(riscv-march-y)c
> +
> +# Note that -mcmodel=medany is used so that Xen can be mapped
> +# into the upper half _or_ the lower half of the address space.
> +# -mcmodel=medlow would force Xen into the lower half.
> +
> +CFLAGS += -march=$(riscv-march-y) -mstrict-align -mcmodel=medany
> +CFLAGS += -I$(BASEDIR)/include
> diff --git a/xen/arch/riscv/configs/tiny64_defconfig b/xen/arch/riscv/configs/tiny64_defconfig
> new file mode 100644
> index 0000000000..3c9a2ff941
> --- /dev/null
> +++ b/xen/arch/riscv/configs/tiny64_defconfig
> @@ -0,0 +1,13 @@
> +# CONFIG_SCHED_CREDIT is not set
> +# CONFIG_SCHED_RTDS is not set
> +# CONFIG_SCHED_NULL is not set
> +# CONFIG_SCHED_ARINC653 is not set
> +# CONFIG_TRACEBUFFER is not set
> +# CONFIG_HYPFS is not set
> +# CONFIG_GRANT_TABLE is not set
> +# CONFIG_SPECULATIVE_HARDEN_ARRAY is not set
> +
> +CONFIG_RISCV_64=y
> +CONFIG_DEBUG=y
> +CONFIG_DEBUG_INFO=y
> +CONFIG_EXPERT=y
> diff --git a/xen/arch/riscv/riscv64/asm-offsets.c b/xen/arch/riscv/riscv64/asm-offsets.c
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/xen/arch/riscv/riscv64/head.S b/xen/arch/riscv/riscv64/head.S
> new file mode 100644
> index 0000000000..0dbc27ba75
> --- /dev/null
> +++ b/xen/arch/riscv/riscv64/head.S
> @@ -0,0 +1,6 @@
> +#include <asm/config.h>
> +
> +        .text
> +
> +ENTRY(start)
> +        j  start
> diff --git a/xen/include/asm-riscv/config.h b/xen/include/asm-riscv/config.h
> new file mode 100644
> index 0000000000..e2ae21de61
> --- /dev/null
> +++ b/xen/include/asm-riscv/config.h
> @@ -0,0 +1,47 @@
> +#ifndef __RISCV_CONFIG_H__
> +#define __RISCV_CONFIG_H__
> +
> +#if defined(CONFIG_RISCV_64)
> +# define LONG_BYTEORDER 3
> +# define ELFSIZE 64
> +# define MAX_VIRT_CPUS 128u
> +#else
> +# error "Unsupported RISCV variant"
> +#endif
> +
> +#define BYTES_PER_LONG (1 << LONG_BYTEORDER)
> +#define BITS_PER_LONG  (BYTES_PER_LONG << 3)
> +#define POINTER_ALIGN  BYTES_PER_LONG
> +
> +#define BITS_PER_LLONG 64
> +
> +/* xen_ulong_t is always 64 bits */
> +#define BITS_PER_XEN_ULONG 64
> +
> +#define CONFIG_RISCV_L1_CACHE_SHIFT 6
> +#define CONFIG_PAGEALLOC_MAX_ORDER  18
> +#define CONFIG_DOMU_MAX_ORDER       9
> +#define CONFIG_HWDOM_MAX_ORDER      10
> +
> +#define OPT_CONSOLE_STR "dtuart"
> +#define INVALID_VCPU_ID MAX_VIRT_CPUS
> +
> +/* Linkage for RISCV */
> +#ifdef __ASSEMBLY__
> +#define ALIGN .align 2
> +
> +#define ENTRY(name)                                \
> +  .globl name;                                     \
> +  ALIGN;                                           \
> +  name:
> +#endif
> +
> +#endif /* __RISCV_CONFIG_H__ */
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> 

Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index d46b08a0d2..5a1f92422a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -456,6 +456,15 @@  F:	tools/libs/light/libxl_nonetbuffer.c
 F:	tools/hotplug/Linux/remus-netbuf-setup
 F:	tools/hotplug/Linux/block-drbd-probe
 
+RISCV
+M:	Bob Eshleman <bobbyeshleman@gmail.com>
+M:	Alistair Francis <alistair.francis@wdc.com>
+R:	Connor Davis <connojdavis@gmail.com>
+S:	Supported
+F:	config/riscv64.mk
+F:	xen/arch/riscv/
+F:	xen/include/asm-riscv/
+
 RTDS SCHEDULER
 M:	Dario Faggioli <dfaggioli@suse.com>
 M:	Meng Xu <mengxu@cis.upenn.edu>
diff --git a/config/riscv64.mk b/config/riscv64.mk
new file mode 100644
index 0000000000..a5a21e5fa2
--- /dev/null
+++ b/config/riscv64.mk
@@ -0,0 +1,5 @@ 
+CONFIG_RISCV := y
+CONFIG_RISCV_64 := y
+CONFIG_RISCV_$(XEN_OS) := y
+
+CONFIG_XEN_INSTALL_SUFFIX :=
diff --git a/xen/Makefile b/xen/Makefile
index 7ce7692354..89879fad4c 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -26,7 +26,9 @@  MAKEFLAGS += -rR
 EFI_MOUNTPOINT ?= $(BOOT_DIR)/efi
 
 ARCH=$(XEN_TARGET_ARCH)
-SRCARCH=$(shell echo $(ARCH) | sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g')
+SRCARCH=$(shell echo $(ARCH) | \
+          sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
+              -e s'/riscv.*/riscv/g')
 
 # Don't break if the build process wasn't called from the top level
 # we need XEN_TARGET_ARCH to generate the proper config
@@ -35,7 +37,8 @@  include $(XEN_ROOT)/Config.mk
 # Set ARCH/SUBARCH appropriately.
 export TARGET_SUBARCH  := $(XEN_TARGET_ARCH)
 export TARGET_ARCH     := $(shell echo $(XEN_TARGET_ARCH) | \
-                            sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g')
+                            sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
+                                -e s'/riscv.*/riscv/g')
 
 # Allow someone to change their config file
 export KCONFIG_CONFIG ?= .config
@@ -335,6 +338,7 @@  _clean: delete-unfresh-files
 	$(MAKE) $(clean) xsm
 	$(MAKE) $(clean) crypto
 	$(MAKE) $(clean) arch/arm
+	$(MAKE) $(clean) arch/riscv
 	$(MAKE) $(clean) arch/x86
 	$(MAKE) $(clean) test
 	$(MAKE) -f $(BASEDIR)/tools/kconfig/Makefile.kconfig ARCH=$(ARCH) SRCARCH=$(SRCARCH) clean
diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
new file mode 100644
index 0000000000..468e250c86
--- /dev/null
+++ b/xen/arch/riscv/Kconfig
@@ -0,0 +1,48 @@ 
+config RISCV
+	def_bool y
+
+config RISCV_64
+	def_bool y
+	select 64BIT
+
+config ARCH_DEFCONFIG
+	string
+	default "arch/riscv/configs/tiny64_defconfig"
+
+menu "Architecture Features"
+
+source "arch/Kconfig"
+
+endmenu
+
+menu "ISA Selection"
+
+choice
+	prompt "Base ISA"
+	default RISCV_ISA_RV64IMA if RISCV_64
+	help
+	  This selects the base ISA extensions that Xen will target.
+
+config RISCV_ISA_RV64IMA
+	bool "RV64IMA"
+	help
+	  Use the RV64I base ISA, plus the "M" and "A" extensions
+	  for integer multiply/divide and atomic instructions, respectively.
+
+endchoice
+
+config RISCV_ISA_C
+	bool "Compressed extension"
+	default y
+	help
+	  Add "C" to the ISA subsets that the toolchain is allowed to
+	  emit when building Xen, which results in compressed instructions
+	  in the Xen binary.
+
+	  If unsure, say Y.
+
+endmenu
+
+source "common/Kconfig"
+
+source "drivers/Kconfig"
diff --git a/xen/arch/riscv/Kconfig.debug b/xen/arch/riscv/Kconfig.debug
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
new file mode 100644
index 0000000000..942e4ffbc1
--- /dev/null
+++ b/xen/arch/riscv/Makefile
@@ -0,0 +1,2 @@ 
+.PHONY: include
+include:
diff --git a/xen/arch/riscv/Rules.mk b/xen/arch/riscv/Rules.mk
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk
new file mode 100644
index 0000000000..53dadb8975
--- /dev/null
+++ b/xen/arch/riscv/arch.mk
@@ -0,0 +1,14 @@ 
+########################################
+# RISCV-specific definitions
+
+CFLAGS-$(CONFIG_RISCV_64) += -mabi=lp64
+
+riscv-march-$(CONFIG_RISCV_ISA_RV64IMA) := rv64ima
+riscv-march-$(CONFIG_RISCV_ISA_C)       := $(riscv-march-y)c
+
+# Note that -mcmodel=medany is used so that Xen can be mapped
+# into the upper half _or_ the lower half of the address space.
+# -mcmodel=medlow would force Xen into the lower half.
+
+CFLAGS += -march=$(riscv-march-y) -mstrict-align -mcmodel=medany
+CFLAGS += -I$(BASEDIR)/include
diff --git a/xen/arch/riscv/configs/tiny64_defconfig b/xen/arch/riscv/configs/tiny64_defconfig
new file mode 100644
index 0000000000..3c9a2ff941
--- /dev/null
+++ b/xen/arch/riscv/configs/tiny64_defconfig
@@ -0,0 +1,13 @@ 
+# CONFIG_SCHED_CREDIT is not set
+# CONFIG_SCHED_RTDS is not set
+# CONFIG_SCHED_NULL is not set
+# CONFIG_SCHED_ARINC653 is not set
+# CONFIG_TRACEBUFFER is not set
+# CONFIG_HYPFS is not set
+# CONFIG_GRANT_TABLE is not set
+# CONFIG_SPECULATIVE_HARDEN_ARRAY is not set
+
+CONFIG_RISCV_64=y
+CONFIG_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_EXPERT=y
diff --git a/xen/arch/riscv/riscv64/asm-offsets.c b/xen/arch/riscv/riscv64/asm-offsets.c
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/xen/arch/riscv/riscv64/head.S b/xen/arch/riscv/riscv64/head.S
new file mode 100644
index 0000000000..0dbc27ba75
--- /dev/null
+++ b/xen/arch/riscv/riscv64/head.S
@@ -0,0 +1,6 @@ 
+#include <asm/config.h>
+
+        .text
+
+ENTRY(start)
+        j  start
diff --git a/xen/include/asm-riscv/config.h b/xen/include/asm-riscv/config.h
new file mode 100644
index 0000000000..e2ae21de61
--- /dev/null
+++ b/xen/include/asm-riscv/config.h
@@ -0,0 +1,47 @@ 
+#ifndef __RISCV_CONFIG_H__
+#define __RISCV_CONFIG_H__
+
+#if defined(CONFIG_RISCV_64)
+# define LONG_BYTEORDER 3
+# define ELFSIZE 64
+# define MAX_VIRT_CPUS 128u
+#else
+# error "Unsupported RISCV variant"
+#endif
+
+#define BYTES_PER_LONG (1 << LONG_BYTEORDER)
+#define BITS_PER_LONG  (BYTES_PER_LONG << 3)
+#define POINTER_ALIGN  BYTES_PER_LONG
+
+#define BITS_PER_LLONG 64
+
+/* xen_ulong_t is always 64 bits */
+#define BITS_PER_XEN_ULONG 64
+
+#define CONFIG_RISCV_L1_CACHE_SHIFT 6
+#define CONFIG_PAGEALLOC_MAX_ORDER  18
+#define CONFIG_DOMU_MAX_ORDER       9
+#define CONFIG_HWDOM_MAX_ORDER      10
+
+#define OPT_CONSOLE_STR "dtuart"
+#define INVALID_VCPU_ID MAX_VIRT_CPUS
+
+/* Linkage for RISCV */
+#ifdef __ASSEMBLY__
+#define ALIGN .align 2
+
+#define ENTRY(name)                                \
+  .globl name;                                     \
+  ALIGN;                                           \
+  name:
+#endif
+
+#endif /* __RISCV_CONFIG_H__ */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */