diff mbox series

[1/2] arm: Add Neoverse N1 processor identifation

Message ID 46faecc92bee2a02490b926a636c3eafef1d185e.1597740876.git.bertrand.marquis@arm.com (mailing list archive)
State New, archived
Headers show
Series Enable 1165522 Errata for Neovers | expand

Commit Message

Bertrand Marquis Aug. 18, 2020, 1:47 p.m. UTC 
Add MIDR and CPU part numbers for Neoverse N1

Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/include/asm-arm/processor.h | 2 ++
 1 file changed, 2 insertions(+)

Comments

Julien Grall Aug. 18, 2020, 2:07 p.m. UTC | #1 
Hi Bertrand,

Title: s/identifation/identification/

On 18/08/2020 14:47, Bertrand Marquis wrote:
> Add MIDR and CPU part numbers for Neoverse N1
> 
> Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>

I can fix the typo on commit:

Acked-by: Julien Grall <jgrall@amazon.com>

Cheers,
Bertrand Marquis Aug. 18, 2020, 2:09 p.m. UTC | #2 
> On 18 Aug 2020, at 15:07, Julien Grall <julien@xen.org> wrote:
> 
> Hi Bertrand,
> 
> Title: s/identifation/identification/

oh yes sorry :-)

> 
> On 18/08/2020 14:47, Bertrand Marquis wrote:
>> Add MIDR and CPU part numbers for Neoverse N1
>> Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
> 
> I can fix the typo on commit:
> 
> Acked-by: Julien Grall <jgrall@amazon.com>
> 

Thanks
Bertrand

> Cheers,
> 
> -- 
> Julien Grall
diff mbox series

Patch

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index aa642e3ab2..3ca67f8157 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -58,6 +58,7 @@ 
 #define ARM_CPU_PART_CORTEX_A73     0xD09
 #define ARM_CPU_PART_CORTEX_A75     0xD0A
 #define ARM_CPU_PART_CORTEX_A76     0xD0B
+#define ARM_CPU_PART_NEOVERSE_N1    0xD0C
 
 #define MIDR_CORTEX_A12 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A12)
 #define MIDR_CORTEX_A17 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A17)
@@ -68,6 +69,7 @@ 
 #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73)
 #define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75)
 #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
+#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
 
 /* MPIDR Multiprocessor Affinity Register */
 #define _MPIDR_UP           (30)