From patchwork Thu Sep 8 13:45:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 9321425 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 981B760752 for ; Thu, 8 Sep 2016 13:50:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 87F122989A for ; Thu, 8 Sep 2016 13:50:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7BF0F2989C; Thu, 8 Sep 2016 13:50:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3E97F2989A for ; Thu, 8 Sep 2016 13:50:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bhzgl-0005aX-L4; Thu, 08 Sep 2016 13:48:23 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bhzgk-0005aL-JA for xen-devel@lists.xenproject.org; Thu, 08 Sep 2016 13:48:22 +0000 Received: from [85.158.137.68] by server-3.bemta-3.messagelabs.com id 72/F3-23620-52C61D75; Thu, 08 Sep 2016 13:48:21 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrFIsWRWlGSWpSXmKPExsXS6fjDS1c152K 4wcK17Bbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8aH5hXsBatdK04e38PUwDjJqIuRk0NIIE9i xvs7bCA2r4CdxJvjj1lAbAkBQ4mn768DxTk4WARUJXq2+YCE2QTUJdqebWcFCYsIGEicO5oEE mYWiJA4dmIaWKewgJtE86F9LBDT7SSWLDgMZnMK2EtMWfKEEaSVV0BQ4u8OYYhWO4mlS/sZJz DyzELIzEKSAQkzA+1dP08IIiwv0bx1NjNEWFpi+T8OCNNEomeFNESFtsSyha+ZIWx7iY2TDrE sYORYxahRnFpUllqka2Shl1SUmZ5RkpuYmaNraGCsl5taXJyYnpqTmFSsl5yfu4kRGKb1DAyM OxjbT/gdYpTkYFIS5fUpvhAuxJeUn1KZkVicEV9UmpNafIhRhoNDSYLXNvtiuJBgUWp6akVaZ g4wYmDSEhw8SiK8H7KA0rzFBYm5xZnpEKlTjIpS4rxcIH0CIImM0jy4NliUXmKUlRLmZWRgYB DiKUgtys0sQZV/xSjOwagkzKsIMoUnM68EbvoroMVMQIuFTp0HWVySiJCSamC8oJXslnnylpF XjJUrf/acjwzi30s9+x3eajyelT7ls1SCxImTD5le8iz0Zl7YqO+2eWritWiP6WEcH1d+OhXk IrRjgs/pHVp3Je7frPPzm13O+O6QeZpTfm6FqMq02+t/ySnveBlZxWTO5Lfvn6eLyhIb+y9fP M9HrWX76LOpZ84z7ZrlIfeVWIozEg21mIuKEwG1dNSazQIAAA== X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-4.tower-31.messagelabs.com!1473342498!9459717!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.84; banners=-,-,- X-VirusChecked: Checked Received: (qmail 24280 invoked from network); 8 Sep 2016 13:48:20 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-4.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 8 Sep 2016 13:48:20 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Thu, 08 Sep 2016 07:45:18 -0600 Message-Id: <57D1878F020000780010D270@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.1 Date: Thu, 08 Sep 2016 07:45:19 -0600 From: "Jan Beulich" To: "xen-devel" References: <57D18589020000780010D251@prv-mh.provo.novell.com> In-Reply-To: <57D18589020000780010D251@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Mihai Dontu Subject: [Xen-devel] [PATCH 4/5] x86/emulate: add support for {, v}movq xmm, xmm/m64 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Mihai Donțu Signed-off-by: Mihai Donțu Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- v4: Re-base on decoding changes. Address my own review comments (where still applicable). #UD when vex.l is set. Various adjustments to the test tool change. x86/emulate: add support for {,v}movq xmm,xmm/m64 From: Mihai Donțu Signed-off-by: Mihai Donțu Signed-off-by: Jan Beulich --- v4: Re-base on decoding changes. Address my own review comments (where still applicable). #UD when vex.l is set. Various adjustments to the test tool change. --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -713,6 +713,54 @@ int main(int argc, char **argv) else printf("skipped\n"); + printf("%-40s", "Testing movq %%xmm0,32(%%ecx)..."); + if ( stack_exec && cpu_has_sse2 ) + { + decl_insn(movq_to_mem2); + + asm volatile ( "pcmpgtb %%xmm0, %%xmm0\n" + put_insn(movq_to_mem2, "movq %%xmm0, 32(%0)") + :: "c" (NULL) ); + + memset(res, 0xbd, 64); + set_insn(movq_to_mem2); + regs.ecx = (unsigned long)res; + regs.edx = 0; + rc = x86_emulate(&ctxt, &emulops); + if ( rc != X86EMUL_OKAY || !check_eip(movq_to_mem2) || + *((uint64_t *)res + 4) || + memcmp(res, res + 10, 24) || + memcmp(res, res + 6, 8) ) + goto fail; + printf("okay\n"); + } + else + printf("skipped\n"); + + printf("%-40s", "Testing vmovq %%xmm1,32(%%edx)..."); + if ( stack_exec && cpu_has_avx ) + { + decl_insn(vmovq_to_mem); + + asm volatile ( "pcmpgtb %%xmm1, %%xmm1\n" + put_insn(vmovq_to_mem, "vmovq %%xmm1, 32(%0)") + :: "d" (NULL) ); + + memset(res, 0xdb, 64); + set_insn(vmovq_to_mem); + regs.ecx = 0; + regs.edx = (unsigned long)res; + rc = x86_emulate(&ctxt, &emulops); + if ( rc != X86EMUL_OKAY || !check_eip(vmovq_to_mem) || + *((uint64_t *)res + 4) || + memcmp(res, res + 10, 24) || + memcmp(res, res + 6, 8) ) + goto fail; + printf("okay\n"); + } + else + printf("skipped\n"); + printf("%-40s", "Testing movdqu %xmm2,(%ecx)..."); if ( stack_exec && cpu_has_sse2 ) { --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -269,7 +269,7 @@ static const opcode_desc_t twobyte_table ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, /* 0xD0 - 0xDF */ - ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, + ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, /* 0xE0 - 0xEF */ ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM, @@ -4779,6 +4779,8 @@ x86_emulate( case X86EMUL_OPC_F3(0x0f, 0x7f): /* movdqu xmm,xmm/m128 */ case X86EMUL_OPC_VEX_F3(0x0f, 0x7f): /* vmovdqu xmm,xmm/m128 */ /* vmovdqu ymm,ymm/m256 */ + case X86EMUL_OPC_66(0x0f, 0xd6): /* movq xmm,xmm/m64 */ + case X86EMUL_OPC_VEX_66(0x0f, 0xd6): /* vmovq xmm,xmm/m64 */ { uint8_t *buf = get_stub(stub); struct fpu_insn_ctxt fic = { .insn_bytes = 5 }; @@ -4796,7 +4798,8 @@ x86_emulate( case vex_66: case vex_f3: host_and_vcpu_must_have(sse2); - buf[0] = 0x66; /* movdqa */ + /* Converting movdqu to movdqa here: Our buffer is aligned. */ + buf[0] = 0x66; get_fpu(X86EMUL_FPU_xmm, &fic); ea.bytes = 16; break; @@ -4819,6 +4822,11 @@ x86_emulate( get_fpu(X86EMUL_FPU_ymm, &fic); ea.bytes = 16 << vex.l; } + if ( b == 0xd6 ) + { + generate_exception_if(vex.l, EXC_UD, -1); + ea.bytes = 8; + } if ( ea.type == OP_MEM ) { generate_exception_if((vex.pfx == vex_66) && --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -713,6 +713,54 @@ int main(int argc, char **argv) else printf("skipped\n"); + printf("%-40s", "Testing movq %%xmm0,32(%%ecx)..."); + if ( stack_exec && cpu_has_sse2 ) + { + decl_insn(movq_to_mem2); + + asm volatile ( "pcmpgtb %%xmm0, %%xmm0\n" + put_insn(movq_to_mem2, "movq %%xmm0, 32(%0)") + :: "c" (NULL) ); + + memset(res, 0xbd, 64); + set_insn(movq_to_mem2); + regs.ecx = (unsigned long)res; + regs.edx = 0; + rc = x86_emulate(&ctxt, &emulops); + if ( rc != X86EMUL_OKAY || !check_eip(movq_to_mem2) || + *((uint64_t *)res + 4) || + memcmp(res, res + 10, 24) || + memcmp(res, res + 6, 8) ) + goto fail; + printf("okay\n"); + } + else + printf("skipped\n"); + + printf("%-40s", "Testing vmovq %%xmm1,32(%%edx)..."); + if ( stack_exec && cpu_has_avx ) + { + decl_insn(vmovq_to_mem); + + asm volatile ( "pcmpgtb %%xmm1, %%xmm1\n" + put_insn(vmovq_to_mem, "vmovq %%xmm1, 32(%0)") + :: "d" (NULL) ); + + memset(res, 0xdb, 64); + set_insn(vmovq_to_mem); + regs.ecx = 0; + regs.edx = (unsigned long)res; + rc = x86_emulate(&ctxt, &emulops); + if ( rc != X86EMUL_OKAY || !check_eip(vmovq_to_mem) || + *((uint64_t *)res + 4) || + memcmp(res, res + 10, 24) || + memcmp(res, res + 6, 8) ) + goto fail; + printf("okay\n"); + } + else + printf("skipped\n"); + printf("%-40s", "Testing movdqu %xmm2,(%ecx)..."); if ( stack_exec && cpu_has_sse2 ) { --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -269,7 +269,7 @@ static const opcode_desc_t twobyte_table ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, /* 0xD0 - 0xDF */ - ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, + ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, /* 0xE0 - 0xEF */ ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM, @@ -4779,6 +4779,8 @@ x86_emulate( case X86EMUL_OPC_F3(0x0f, 0x7f): /* movdqu xmm,xmm/m128 */ case X86EMUL_OPC_VEX_F3(0x0f, 0x7f): /* vmovdqu xmm,xmm/m128 */ /* vmovdqu ymm,ymm/m256 */ + case X86EMUL_OPC_66(0x0f, 0xd6): /* movq xmm,xmm/m64 */ + case X86EMUL_OPC_VEX_66(0x0f, 0xd6): /* vmovq xmm,xmm/m64 */ { uint8_t *buf = get_stub(stub); struct fpu_insn_ctxt fic = { .insn_bytes = 5 }; @@ -4796,7 +4798,8 @@ x86_emulate( case vex_66: case vex_f3: host_and_vcpu_must_have(sse2); - buf[0] = 0x66; /* movdqa */ + /* Converting movdqu to movdqa here: Our buffer is aligned. */ + buf[0] = 0x66; get_fpu(X86EMUL_FPU_xmm, &fic); ea.bytes = 16; break; @@ -4819,6 +4822,11 @@ x86_emulate( get_fpu(X86EMUL_FPU_ymm, &fic); ea.bytes = 16 << vex.l; } + if ( b == 0xd6 ) + { + generate_exception_if(vex.l, EXC_UD, -1); + ea.bytes = 8; + } if ( ea.type == OP_MEM ) { generate_exception_if((vex.pfx == vex_66) &&