| Message ID | 57D667A2020000780010DD75@prv-mh.provo.novell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
--- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -1628,9 +1628,12 @@ static int hvmemul_get_fpu( switch ( type ) { case X86EMUL_FPU_fpu: + if ( (curr->arch.hvm_vcpu.guest_cr[0] & X86_CR0_EM) ) + return X86EMUL_UNHANDLEABLE; break; case X86EMUL_FPU_mmx: - if ( !cpu_has_mmx ) + if ( !cpu_has_mmx || + (curr->arch.hvm_vcpu.guest_cr[0] & X86_CR0_EM) ) return X86EMUL_UNHANDLEABLE; break; case X86EMUL_FPU_xmm:
I'm pretty certain I had meant to make this a follow-up to what is now 11c35f84b5 ("x86/emulator: generalize movq emulation (SSE2 and AVX variants)"), but I obviously never did. Correct this: Just like SSE insns, FPU and MMX ones require CR0.EM to be clear. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- Albeit perhaps we should really make this deliver #NM instead of returning "unhandleable", but that's a separate step to take. x86/HVM: consistently check CR0.EM in hvmemul_get_fpu() I'm pretty certain I had meant to make this a follow-up to what is now 11c35f84b5 ("x86/emulator: generalize movq emulation (SSE2 and AVX variants)"), but I obviously never did. Correct this: Just like SSE insns, FPU and MMX ones require CR0.EM to be clear. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- Albeit perhaps we should really make this deliver #NM instead of returning "unhandleable", but that's a separate step to take. --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -1628,9 +1628,12 @@ static int hvmemul_get_fpu( switch ( type ) { case X86EMUL_FPU_fpu: + if ( (curr->arch.hvm_vcpu.guest_cr[0] & X86_CR0_EM) ) + return X86EMUL_UNHANDLEABLE; break; case X86EMUL_FPU_mmx: - if ( !cpu_has_mmx ) + if ( !cpu_has_mmx || + (curr->arch.hvm_vcpu.guest_cr[0] & X86_CR0_EM) ) return X86EMUL_UNHANDLEABLE; break; case X86EMUL_FPU_xmm: