From patchwork Fri Sep 30 09:39:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 9357879 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6D6026075E for ; Fri, 30 Sep 2016 09:41:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5EA1B29F5B for ; Fri, 30 Sep 2016 09:41:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5362629F5E; Fri, 30 Sep 2016 09:41:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D24D429F5B for ; Fri, 30 Sep 2016 09:41:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bpuHh-0002t9-9v; Fri, 30 Sep 2016 09:39:13 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bpuHg-0002t2-Of for xen-devel@lists.xenproject.org; Fri, 30 Sep 2016 09:39:12 +0000 Received: from [85.158.139.211] by server-5.bemta-5.messagelabs.com id 4D/A2-30284-0C23EE75; Fri, 30 Sep 2016 09:39:12 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRWlGSWpSXmKPExsXS6fjDS3eP0bt wgwUrWCy+b5nM5MDocfjDFZYAxijWzLyk/IoE1owjV76xFtzVqdiyZDpjA+M/pS5GTg4hgTyJ K5OWMYLYvAJ2Eh+mL2IDsSUEDCWevr8OZrMIqEpc2TiLHcRmE1CXaHu2nbWLkYNDRMBA4tzRJ BCTWUBfYts6FhBTWEBbYlqfIojJKyAo8XeHMEgfM8jsK33MExi5ZiFkZiHJQNhaEg9/3WKBsL Ulli18zTwLbLy0xPJ/HBBhU4m+hTtZUZWA2A4Sz7Z9Z13AyLGKUaM4tagstUjXyEQvqSgzPaM kNzEzR9fQwFQvN7W4ODE9NScxqVgvOT93EyMw8OoZGBh3MN6c7HeIUZKDSUmUV/bo23AhvqT8 lMqMxOKM+KLSnNTiQ4wyHBxKErz8wEAWEixKTU+tSMvMAcYATFqCg0dJhPeGIVCat7ggMbc4M x0idYpRUUqc9zNIQgAkkVGaB9cGi7tLjLJSwryMDAwMQjwFqUW5mSWo8q8YxTkYlYR5S0Cm8G TmlcBNfwW0mAlocf7RNyCLSxIRUlINjHmS5Ybnv0hIhp1+8nKD2GnhezpTDrNM8yipMdi4Ve1 84ulDdp3fz0+fHXg4qycrhHVizCyJdxsW7jbnl0tj/rqiQH82Z9Iq4YV/VZ9fkvDh2qz/fAu/ /I2d3JELF/xal3gx/+mFgyIcIVHt97cdVg0J4P467Uv9neSti3dcDRZNePdu8tZd1+cosRRnJ BpqMRcVJwIA6/RjvLYCAAA= X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-8.tower-206.messagelabs.com!1475228345!62289427!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.84; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6204 invoked from network); 30 Sep 2016 09:39:06 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-8.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 30 Sep 2016 09:39:06 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Fri, 30 Sep 2016 03:39:04 -0600 Message-Id: <57EE4ED9020000780011415A@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.1 Date: Fri, 30 Sep 2016 03:39:05 -0600 From: "Jan Beulich" To: "xen-devel" Mime-Version: 1.0 Cc: Andrew Cooper Subject: [Xen-devel] [PATCH v3] x86emul: support XSETBV X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is a prereq for switching PV privileged op emulation to the generic instruction emulator. Since handle_xsetbv() is already capable of dealing with all guest kinds, avoid introducing another hook here. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- v3: Include asm/xstate.h, requiring adjustments to EFER_* definition placement (which otherwise causes conflicts with their definition elsewhere). v2: Explicitly generate #UD when vex.pfx is non-zero. x86emul: support XSETBV This is a prereq for switching PV privileged op emulation to the generic instruction emulator. Since handle_xsetbv() is already capable of dealing with all guest kinds, avoid introducing another hook here. Signed-off-by: Jan Beulich --- v3: Include asm/xstate.h, requiring adjustments to EFER_* definition placement (which otherwise causes conflicts with their definition elsewhere). v2: Explicitly generate #UD when vex.pfx is non-zero. --- a/tools/tests/x86_emulator/x86_emulate.c +++ b/tools/tests/x86_emulator/x86_emulate.c @@ -10,6 +10,9 @@ typedef bool bool_t; #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) +#define EFER_SCE (1 << 0) +#define EFER_LMA (1 << 10) + #define BUG() abort() #define ASSERT assert #define ASSERT_UNREACHABLE() assert(!__LINE__) --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -13,6 +13,7 @@ #include #include /* mark_regs_dirty() */ #include /* current_cpu_info */ +#include #include /* cpu_has_amd_erratum() */ /* Avoid namespace pollution. */ --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -410,8 +410,6 @@ typedef union { #define MSR_SYSENTER_ESP 0x00000175 #define MSR_SYSENTER_EIP 0x00000176 #define MSR_EFER 0xc0000080 -#define EFER_SCE (1u<<0) -#define EFER_LMA (1u<<10) #define MSR_STAR 0xc0000081 #define MSR_LSTAR 0xc0000082 #define MSR_CSTAR 0xc0000083 @@ -4163,6 +4161,23 @@ x86_emulate( switch( modrm ) { +#ifdef __XEN__ + case 0xd1: /* xsetbv */ + { + unsigned long cr4; + + generate_exception_if(vex.pfx, EXC_UD, -1); + if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD, -1); + generate_exception_if(!mode_ring0() || + handle_xsetbv(_regs._ecx, + _regs._eax | (_regs.rdx << 32)), + EXC_GP, 0); + goto no_writeback; + } +#endif + case 0xdf: /* invlpga */ generate_exception_if(!in_protmode(ctxt, ops), EXC_UD, -1); generate_exception_if(!mode_ring0(), EXC_GP, 0); --- a/tools/tests/x86_emulator/x86_emulate.c +++ b/tools/tests/x86_emulator/x86_emulate.c @@ -10,6 +10,9 @@ typedef bool bool_t; #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) +#define EFER_SCE (1 << 0) +#define EFER_LMA (1 << 10) + #define BUG() abort() #define ASSERT assert #define ASSERT_UNREACHABLE() assert(!__LINE__) --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -13,6 +13,7 @@ #include #include /* mark_regs_dirty() */ #include /* current_cpu_info */ +#include #include /* cpu_has_amd_erratum() */ /* Avoid namespace pollution. */ --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -410,8 +410,6 @@ typedef union { #define MSR_SYSENTER_ESP 0x00000175 #define MSR_SYSENTER_EIP 0x00000176 #define MSR_EFER 0xc0000080 -#define EFER_SCE (1u<<0) -#define EFER_LMA (1u<<10) #define MSR_STAR 0xc0000081 #define MSR_LSTAR 0xc0000082 #define MSR_CSTAR 0xc0000083 @@ -4163,6 +4161,23 @@ x86_emulate( switch( modrm ) { +#ifdef __XEN__ + case 0xd1: /* xsetbv */ + { + unsigned long cr4; + + generate_exception_if(vex.pfx, EXC_UD, -1); + if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD, -1); + generate_exception_if(!mode_ring0() || + handle_xsetbv(_regs._ecx, + _regs._eax | (_regs.rdx << 32)), + EXC_GP, 0); + goto no_writeback; + } +#endif + case 0xdf: /* invlpga */ generate_exception_if(!in_protmode(ctxt, ops), EXC_UD, -1); generate_exception_if(!mode_ring0(), EXC_GP, 0);