diff mbox

[v2,3/4] x86emul: support RTM instructions

Message ID 57EE81FD0200007800114443@prv-mh.provo.novell.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jan Beulich Sept. 30, 2016, 1:17 p.m. UTC
Minimal emulation: XBEGIN aborts right away, hence
- XABORT is just a no-op,
- XEND always raises #GP,
- XTEST always signals neither RTM nor HLE are active.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Explicitly generate #UD for xtest and xend.
x86emul: support RTM instructions

Minimal emulation: XBEGIN aborts right away, hence
- XABORT is just a no-op,
- XEND always raises #GP,
- XTEST always signals neither RTM nor HLE are active.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Explicitly generate #UD for xtest and xend.

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1170,6 +1170,8 @@ static bool_t vcpu_has(
 #define vcpu_has_clflush() vcpu_has(       1, EDX, 19, ctxt, ops)
 #define vcpu_has_lzcnt() vcpu_has(0x80000001, ECX,  5, ctxt, ops)
 #define vcpu_has_bmi1()  vcpu_has(0x00000007, EBX,  3, ctxt, ops)
+#define vcpu_has_hle()   vcpu_has(0x00000007, EBX,  4, ctxt, ops)
+#define vcpu_has_rtm()   vcpu_has(0x00000007, EBX, 11, ctxt, ops)
 
 #define vcpu_must_have(leaf, reg, bit) \
     generate_exception_if(!vcpu_has(leaf, reg, bit, ctxt, ops), EXC_UD, -1)
@@ -2863,7 +2865,18 @@ x86_emulate(
         lock_prefix = 1;
         break;
 
-    case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
+    case 0xc6: /* Grp11: mov / xabort */
+    case 0xc7: /* Grp11: mov / xbegin */
+        if ( modrm == 0xf8 && vcpu_has_rtm() )
+        {
+            if ( b & 1 )
+            {
+                jmp_rel((int32_t)src.val);
+                _regs.eax = 0;
+            }
+            dst.type = OP_NONE;
+            break;
+        }
         generate_exception_if((modrm_reg & 7) != 0, EXC_UD, -1);
     case 0x88 ... 0x8b: /* mov */
     case 0xa0 ... 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */
@@ -4248,6 +4261,20 @@ x86_emulate(
                 goto done;
             goto no_writeback;
 
+        case 0xd5: /* xend */
+            generate_exception_if(vex.pfx, EXC_UD, -1);
+            generate_exception_if(!vcpu_has_rtm(), EXC_UD, -1);
+            generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
+            break;
+
+        case 0xd6: /* xtest */
+            generate_exception_if(vex.pfx, EXC_UD, -1);
+            generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
+                                  EXC_UD, -1);
+            /* Neither HLE nor RTM can be active when we get here. */
+            _regs.eflags |= EFLG_ZF;
+            goto no_writeback;
+
         case 0xdf: /* invlpga */
             generate_exception_if(!in_protmode(ctxt, ops), EXC_UD, -1);
             generate_exception_if(!mode_ring0(), EXC_GP, 0);

Comments

Andrew Cooper Sept. 30, 2016, 2:10 p.m. UTC | #1
On 30/09/16 14:17, Jan Beulich wrote:
> Minimal emulation: XBEGIN aborts right away, hence
> - XABORT is just a no-op,
> - XEND always raises #GP,
> - XTEST always signals neither RTM nor HLE are active.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> v2: Explicitly generate #UD for xtest and xend.
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -1170,6 +1170,8 @@ static bool_t vcpu_has(
>  #define vcpu_has_clflush() vcpu_has(       1, EDX, 19, ctxt, ops)
>  #define vcpu_has_lzcnt() vcpu_has(0x80000001, ECX,  5, ctxt, ops)
>  #define vcpu_has_bmi1()  vcpu_has(0x00000007, EBX,  3, ctxt, ops)
> +#define vcpu_has_hle()   vcpu_has(0x00000007, EBX,  4, ctxt, ops)
> +#define vcpu_has_rtm()   vcpu_has(0x00000007, EBX, 11, ctxt, ops)
>  
>  #define vcpu_must_have(leaf, reg, bit) \
>      generate_exception_if(!vcpu_has(leaf, reg, bit, ctxt, ops), EXC_UD, -1)
> @@ -2863,7 +2865,18 @@ x86_emulate(
>          lock_prefix = 1;
>          break;
>  
> -    case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
> +    case 0xc6: /* Grp11: mov / xabort */
> +    case 0xc7: /* Grp11: mov / xbegin */
> +        if ( modrm == 0xf8 && vcpu_has_rtm() )
> +        {

Please could we leave notes as to the current behaviour, as it isn't a
full emulation.  i.e.

/* xbegin unconditionally aborts, xabort is unconditionally a nop. */

With something to this effect, Reviewed-by: Andrew Cooper
<andrew.cooper3@citrix.com>

> +            if ( b & 1 )
> +            {
> +                jmp_rel((int32_t)src.val);
> +                _regs.eax = 0;
> +            }
> +            dst.type = OP_NONE;
> +            break;
> +        }
>          generate_exception_if((modrm_reg & 7) != 0, EXC_UD, -1);
>      case 0x88 ... 0x8b: /* mov */
>      case 0xa0 ... 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */
> @@ -4248,6 +4261,20 @@ x86_emulate(
>                  goto done;
>              goto no_writeback;
>  
> +        case 0xd5: /* xend */
> +            generate_exception_if(vex.pfx, EXC_UD, -1);
> +            generate_exception_if(!vcpu_has_rtm(), EXC_UD, -1);
> +            generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
> +            break;
> +
> +        case 0xd6: /* xtest */
> +            generate_exception_if(vex.pfx, EXC_UD, -1);
> +            generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
> +                                  EXC_UD, -1);
> +            /* Neither HLE nor RTM can be active when we get here. */
> +            _regs.eflags |= EFLG_ZF;
> +            goto no_writeback;
> +
>          case 0xdf: /* invlpga */
>              generate_exception_if(!in_protmode(ctxt, ops), EXC_UD, -1);
>              generate_exception_if(!mode_ring0(), EXC_GP, 0);
>
>
>
diff mbox

Patch

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1170,6 +1170,8 @@  static bool_t vcpu_has(
 #define vcpu_has_clflush() vcpu_has(       1, EDX, 19, ctxt, ops)
 #define vcpu_has_lzcnt() vcpu_has(0x80000001, ECX,  5, ctxt, ops)
 #define vcpu_has_bmi1()  vcpu_has(0x00000007, EBX,  3, ctxt, ops)
+#define vcpu_has_hle()   vcpu_has(0x00000007, EBX,  4, ctxt, ops)
+#define vcpu_has_rtm()   vcpu_has(0x00000007, EBX, 11, ctxt, ops)
 
 #define vcpu_must_have(leaf, reg, bit) \
     generate_exception_if(!vcpu_has(leaf, reg, bit, ctxt, ops), EXC_UD, -1)
@@ -2863,7 +2865,18 @@  x86_emulate(
         lock_prefix = 1;
         break;
 
-    case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
+    case 0xc6: /* Grp11: mov / xabort */
+    case 0xc7: /* Grp11: mov / xbegin */
+        if ( modrm == 0xf8 && vcpu_has_rtm() )
+        {
+            if ( b & 1 )
+            {
+                jmp_rel((int32_t)src.val);
+                _regs.eax = 0;
+            }
+            dst.type = OP_NONE;
+            break;
+        }
         generate_exception_if((modrm_reg & 7) != 0, EXC_UD, -1);
     case 0x88 ... 0x8b: /* mov */
     case 0xa0 ... 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */
@@ -4248,6 +4261,20 @@  x86_emulate(
                 goto done;
             goto no_writeback;
 
+        case 0xd5: /* xend */
+            generate_exception_if(vex.pfx, EXC_UD, -1);
+            generate_exception_if(!vcpu_has_rtm(), EXC_UD, -1);
+            generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
+            break;
+
+        case 0xd6: /* xtest */
+            generate_exception_if(vex.pfx, EXC_UD, -1);
+            generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
+                                  EXC_UD, -1);
+            /* Neither HLE nor RTM can be active when we get here. */
+            _regs.eflags |= EFLG_ZF;
+            goto no_writeback;
+
         case 0xdf: /* invlpga */
             generate_exception_if(!in_protmode(ctxt, ops), EXC_UD, -1);
             generate_exception_if(!mode_ring0(), EXC_GP, 0);