diff mbox

x86: replace redundant MTRR MSR definitions

Message ID 57FB695D0200007800115FA7@prv-mh.provo.novell.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jan Beulich Oct. 10, 2016, 8:11 a.m. UTC 
We really should have only one set of #define-s for them.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
x86: replace redundant MTRR MSR definitions

We really should have only one set of #define-s for them.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -419,8 +419,6 @@ static void __init clip_to_limit(uint64_
 }
 
 /* Conservative estimate of top-of-RAM by looking for MTRR WB regions. */
-#define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg))
-#define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1)
 static uint64_t __init mtrr_top_of_ram(void)
 {
     uint32_t eax, ebx, ecx, edx;
@@ -477,8 +475,8 @@ static uint64_t __init mtrr_top_of_ram(v
     top = 0;
     for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
     {
-        rdmsrl(MSR_MTRRphysBase(i), base);
-        rdmsrl(MSR_MTRRphysMask(i), mask);
+        rdmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+        rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
 
         if ( e820_verbose )
             printk(" MTRR[%d]: base %"PRIx64" mask %"PRIx64"\n",

Comments

Andrew Cooper Oct. 10, 2016, 8:59 a.m. UTC | #1 
On 10/10/16 09:11, Jan Beulich wrote:
> We really should have only one set of #define-s for them.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Agreed.  Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff mbox

Patch

--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -419,8 +419,6 @@  static void __init clip_to_limit(uint64_
 }
 
 /* Conservative estimate of top-of-RAM by looking for MTRR WB regions. */
-#define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg))
-#define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1)
 static uint64_t __init mtrr_top_of_ram(void)
 {
     uint32_t eax, ebx, ecx, edx;
@@ -477,8 +475,8 @@  static uint64_t __init mtrr_top_of_ram(v
     top = 0;
     for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
     {
-        rdmsrl(MSR_MTRRphysBase(i), base);
-        rdmsrl(MSR_MTRRphysMask(i), mask);
+        rdmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+        rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
 
         if ( e820_verbose )
             printk(" MTRR[%d]: base %"PRIx64" mask %"PRIx64"\n",