From patchwork Wed Jun 21 12:04:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 9801695 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C5AA1600C5 for ; Wed, 21 Jun 2017 12:07:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B419328595 for ; Wed, 21 Jun 2017 12:07:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A7813285AF; Wed, 21 Jun 2017 12:07:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 235D628595 for ; Wed, 21 Jun 2017 12:07:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dNeNN-0008Fz-GN; Wed, 21 Jun 2017 12:04:49 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dNeNM-0008FZ-Ke for xen-devel@lists.xenproject.org; Wed, 21 Jun 2017 12:04:48 +0000 Received: from [85.158.143.35] by server-9.bemta-6.messagelabs.com id 9A/02-03557-0E06A495; Wed, 21 Jun 2017 12:04:48 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrOIsWRWlGSWpSXmKPExsXS6fjDS/d+gle kQfsTUYvvWyYzOTB6HP5whSWAMYo1My8pvyKBNWPF5VamgmUqFUdmXWFtYDwl1cXIwSEkkCex 9X9GFyMnB6+AncSO+XcZQWwJAUOJ0wtvsoDYLAKqEtdfLgSz2QTUJdqebWcFaRURMJA4dzQJx GQW0JfYtg6sQljAT2LHj+NgU4QEiiSOtu4Fi3MK2Ess6frIBlLOKyAo8XeHMEiYGWjp9PMHmC Yw8sxCyMxCkoGwtSQe/rrFAmFrSyxb+Jp5FtheaYnl/zggwpYSTY83MqMqAbFdJPZtbGRfwMi xilGjOLWoLLVI18hcL6koMz2jJDcxM0fX0MBMLze1uDgxPTUnMalYLzk/dxMjMFAZgGAH4+K1 gYcYJTmYlER5y729IoX4kvJTKjMSizPii0pzUosPMWpwcAhs27X6AqMUS15+XqqSBO/veKA6w aLU9NSKtMwcYCzBlEpw8CiJ8LoFAKV5iwsSc4sz0yFSpxgVpcR5F4P0CYAkMkrz4Npg8XuJUV ZKmJcR6CghnoLUotzMElT5V4ziHIxKwrx2cUBTeDLzSuCmvwJazAS0+MURD5DFJYkIKakGxvb dXx+xrgu1SngSeuUWA4ezmsevKINFPLteV82ZX9esf+zKyjNFLz5ZHBFfU50iVFdyrbU9uXb2 450+x8vnFun/cDnvNffY0csHYwQ3LjE9btqRe6IoP/OnjHi4a/DNn3n1DZcjTHT+PK/mN5k70 0yZxzNHv/XkqhwT5alf1s4/OLPc5ExehhJLcUaioRZzUXEiALFBghbaAgAA X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-7.tower-21.messagelabs.com!1498046685!75006185!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.19; banners=-,-,- X-VirusChecked: Checked Received: (qmail 32156 invoked from network); 21 Jun 2017 12:04:47 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-7.tower-21.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 21 Jun 2017 12:04:47 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Wed, 21 Jun 2017 06:04:45 -0600 Message-Id: <594A7CFC0200007800165347@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.2 Date: Wed, 21 Jun 2017 06:04:44 -0600 From: "Jan Beulich" To: "xen-devel" References: <594A733B020000780016527C@prv-mh.provo.novell.com> <594A733B020000780016527C@prv-mh.provo.novell.com> In-Reply-To: <594A733B020000780016527C@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper Subject: [Xen-devel] [PATCH 10/17] x86emul: add tables for XOP 08 and 09 extension spaces X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Convert the few existing opcodes so far supported. Also adjust two vex_* case labels to better be ext_* (the values are identical). Signed-off-by: Jan Beulich x86emul: add tables for XOP 08 and 09 extension spaces Convert the few existing opcodes so far supported. Also adjust two vex_* case labels to better be ext_* (the values are identical). Signed-off-by: Jan Beulich --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -458,6 +458,20 @@ static const opcode_desc_t xop_table[] = DstReg|SrcImm|ModRM, }; +static const struct { + uint8_t simd_size:5; + uint8_t two_op:1; + uint8_t four_op:1; +} ext8f08_table[256] = { +}; + +static const struct { + uint8_t simd_size:5; + uint8_t two_op:1; +} ext8f09_table[256] = { + [0x01 ... 0x02] = { .two_op = 1 }, +}; + #define REX_PREFIX 0x40 #define REX_B 0x01 #define REX_X 0x02 @@ -2716,7 +2730,7 @@ x86_decode( } break; - case vex_0f38: + case ext_0f38: d = ext0f38_table[b].to_mem ? DstMem | SrcReg : DstReg | SrcMem; if ( ext0f38_table[b].two_op ) @@ -2726,7 +2740,14 @@ x86_decode( state->simd_size = ext0f38_table[b].simd_size; break; - case vex_0f3a: + case ext_8f09: + if ( ext8f09_table[b].two_op ) + d |= TwoOp; + state->simd_size = ext8f09_table[b].simd_size; + break; + + case ext_0f3a: + case ext_8f08: /* * Cannot update d here yet, as the immediate operand still * needs fetching. @@ -2919,6 +2940,15 @@ x86_decode( break; case ext_8f08: + d = DstReg | SrcMem; + if ( ext8f08_table[b].two_op ) + d |= TwoOp; + else if ( ext8f08_table[b].four_op && !mode_64bit() ) + imm1 &= 0x7f; + state->desc = d; + state->simd_size = ext8f08_table[b].simd_size; + break; + case ext_8f09: case ext_8f0a: break; --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -458,6 +458,20 @@ static const opcode_desc_t xop_table[] = DstReg|SrcImm|ModRM, }; +static const struct { + uint8_t simd_size:5; + uint8_t two_op:1; + uint8_t four_op:1; +} ext8f08_table[256] = { +}; + +static const struct { + uint8_t simd_size:5; + uint8_t two_op:1; +} ext8f09_table[256] = { + [0x01 ... 0x02] = { .two_op = 1 }, +}; + #define REX_PREFIX 0x40 #define REX_B 0x01 #define REX_X 0x02 @@ -2716,7 +2730,7 @@ x86_decode( } break; - case vex_0f38: + case ext_0f38: d = ext0f38_table[b].to_mem ? DstMem | SrcReg : DstReg | SrcMem; if ( ext0f38_table[b].two_op ) @@ -2726,7 +2740,14 @@ x86_decode( state->simd_size = ext0f38_table[b].simd_size; break; - case vex_0f3a: + case ext_8f09: + if ( ext8f09_table[b].two_op ) + d |= TwoOp; + state->simd_size = ext8f09_table[b].simd_size; + break; + + case ext_0f3a: + case ext_8f08: /* * Cannot update d here yet, as the immediate operand still * needs fetching. @@ -2919,6 +2940,15 @@ x86_decode( break; case ext_8f08: + d = DstReg | SrcMem; + if ( ext8f08_table[b].two_op ) + d |= TwoOp; + else if ( ext8f08_table[b].four_op && !mode_64bit() ) + imm1 &= 0x7f; + state->desc = d; + state->simd_size = ext8f08_table[b].simd_size; + break; + case ext_8f09: case ext_8f0a: break;