diff mbox

x86emul: correct VEX.L handling for VCVT{, T}S{S, D}2SI

Message ID 596347E7020000780016A1DF@prv-mh.provo.novell.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jan Beulich July 10, 2017, 7:24 a.m. UTC 
Recent changes to the SDM (and XED) have made clear that older hardware
raising #UD when the bit is set was really an erratum. Generalize the
so far AMD-only override.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

Comments

Andrew Cooper Sept. 5, 2017, 12:48 p.m. UTC | #1 
On 10/07/17 08:24, Jan Beulich wrote:
> Recent changes to the SDM (and XED) have made clear that older hardware
> raising #UD when the bit is set was really an erratum. Generalize the
> so far AMD-only override.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff mbox

Patch

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5598,9 +5598,8 @@  x86_emulate(
         }
         else
         {
-            if ( ctxt->vendor == X86_VENDOR_AMD )
-                vex.l = 0;
-            generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD);
+            generate_exception_if(vex.reg != 0xf, EXC_UD);
+            vex.l = 0;
             host_and_vcpu_must_have(avx);
             get_fpu(X86EMUL_FPU_ymm, &fic);
         }