From patchwork Fri Oct 20 14:23:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 10020331 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 206DB60234 for ; Fri, 20 Oct 2017 14:25:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0CCAD28C7F for ; Fri, 20 Oct 2017 14:25:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0168A28D5B; Fri, 20 Oct 2017 14:25:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 80D8028C7F for ; Fri, 20 Oct 2017 14:25:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e5YCy-0001IQ-UP; Fri, 20 Oct 2017 14:23:32 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e5YCx-0001Hx-BU for xen-devel@lists.xenproject.org; Fri, 20 Oct 2017 14:23:31 +0000 Received: from [85.158.137.68] by server-5.bemta-3.messagelabs.com id 68/4B-20834-2E60AE95; Fri, 20 Oct 2017 14:23:30 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHIsWRWlGSWpSXmKPExsXS6fjDS/c+26t IgxdzNC2+b5nM5MDocfjDFZYAxijWzLyk/IoE1oyNt38yF2xRqNixYD9TA+NNiS5GTg4hgTyJ 9qUn2LoYOTh4BewkPt4XBwlLCBhKnF54kwXEZhFQlWjetIkJxGYTUJdoe7adFaRcRMBA4tzRJ JAws0C4xPdHvWwgtrBAgMTcmydZIKbbSfy7OJ8dxOYUsJeY8HcWO8QmQYm/O4QhWrUkHv66xQ Jha0ssW/iaGaSEWUBaYvk/jgmMfLMQGmYhaZiFpGEWQsMCRpZVjOrFqUVlqUW6RnpJRZnpGSW 5iZk5uoYGxnq5qcXFiempOYlJxXrJ+bmbGIFhV8/AwLiD8VSz8yFGSQ4mJVHewMqXkUJ8Sfkp lRmJxRnxRaU5qcWHGGU4OJQkeC+zvooUEixKTU+tSMvMAUYATFqCg0dJhDcRJM1bXJCYW5yZD pE6xajL0XHz7h8mIZa8/LxUKXHeYpAiAZCijNI8uBGwaLzEKCslzMvIwMAgxFOQWpSbWYIq/4 pRnINRSZh3C8gUnsy8ErhNr4COYAI6gt3+BcgRJYkIKakGRn3GSYf+SAm6H8w8mFSyweTX/pJ IgRb7c4Fb97m2mZ68v83n86kF25aW7ivZmDhDyCSIRTGj1/JeDnvdlrdX/a7zad70kS80fl49 YY6UTpxe18/7+2Qkdz5uuDj/q+q8SfnW/08rq7F4rK1cvdhMZs2Ta/yra3ov/Ps3yXliVrTa5 Cdtn4UkDymxFGckGmoxFxUnAgA5ebfbwQIAAA== X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-3.tower-31.messagelabs.com!1508509405!111216125!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 38411 invoked from network); 20 Oct 2017 14:23:27 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-3.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 20 Oct 2017 14:23:27 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Fri, 20 Oct 2017 08:23:25 -0600 Message-Id: <59EA22FD0200007800188C19@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.2 Date: Fri, 20 Oct 2017 08:23:25 -0600 From: "Jan Beulich" To: "xen-devel" References: <59EA201F0200007800188BF5@prv-mh.provo.novell.com> In-Reply-To: <59EA201F0200007800188BF5@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Disposition: inline Cc: Andrew Cooper , Julien Grall Subject: [Xen-devel] [PATCH 2/3] x86: also show FS/GS base addresses when dumping registers X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Their state may be important to figure the reason for a crash. To not further grow duplicate code, break out a helper function. I realize that (ab)using the control register array here may not be considered the nicest solution, but it seems easier (and less overall overhead) to do so compared to the alternative of introducing another helper structure. Signed-off-by: Jan Beulich --- a/xen/arch/x86/x86_64/traps.c +++ b/xen/arch/x86/x86_64/traps.c @@ -36,6 +36,21 @@ static void print_xen_info(void) enum context { CTXT_hypervisor, CTXT_pv_guest, CTXT_hvm_guest }; +static void read_registers(struct cpu_user_regs *regs, unsigned long crs[8]) +{ + crs[0] = read_cr0(); + crs[2] = read_cr2(); + crs[3] = read_cr3(); + crs[4] = read_cr4(); + regs->ds = read_sreg(ds); + regs->es = read_sreg(es); + regs->fs = read_sreg(fs); + regs->gs = read_sreg(gs); + crs[5] = rdfsbase(); + crs[6] = rdgsbase(); + rdmsrl(MSR_SHADOW_GS_BASE, crs[7]); +} + static void _show_registers( const struct cpu_user_regs *regs, unsigned long crs[8], enum context context, const struct vcpu *v) @@ -74,6 +89,8 @@ static void _show_registers( else printk("cr0: %016lx cr4: %016lx\n", crs[0], crs[4]); printk("cr3: %016lx cr2: %016lx\n", crs[3], crs[2]); + printk("fsb: %016lx gsb: %016lx gss: %016lx\n", + crs[5], crs[6], crs[7]); printk("ds: %04x es: %04x fs: %04x gs: %04x " "ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, @@ -103,13 +120,18 @@ void show_registers(const struct cpu_use fault_regs.es = sreg.sel; hvm_get_segment_register(v, x86_seg_fs, &sreg); fault_regs.fs = sreg.sel; + fault_crs[5] = sreg.base; hvm_get_segment_register(v, x86_seg_gs, &sreg); fault_regs.gs = sreg.sel; + fault_crs[6] = sreg.base; hvm_get_segment_register(v, x86_seg_ss, &sreg); fault_regs.ss = sreg.sel; + fault_crs[7] = hvm_get_shadow_gs_base(v); } else { + read_registers(&fault_regs, fault_crs); + if ( guest_mode(regs) ) { context = CTXT_pv_guest; @@ -120,14 +142,6 @@ void show_registers(const struct cpu_use context = CTXT_hypervisor; fault_crs[2] = read_cr2(); } - - fault_crs[0] = read_cr0(); - fault_crs[3] = read_cr3(); - fault_crs[4] = read_cr4(); - fault_regs.ds = read_sreg(ds); - fault_regs.es = read_sreg(es); - fault_regs.fs = read_sreg(fs); - fault_regs.gs = read_sreg(gs); } print_xen_info(); @@ -146,6 +160,7 @@ void show_registers(const struct cpu_use void vcpu_show_registers(const struct vcpu *v) { const struct cpu_user_regs *regs = &v->arch.user_regs; + bool_t kernel = guest_kernel_mode(v, regs); unsigned long crs[8]; /* Only handle PV guests for now */ @@ -154,10 +169,13 @@ void vcpu_show_registers(const struct vc crs[0] = v->arch.pv_vcpu.ctrlreg[0]; crs[2] = arch_get_cr2(v); - crs[3] = pagetable_get_paddr(guest_kernel_mode(v, regs) ? + crs[3] = pagetable_get_paddr(kernel ? v->arch.guest_table : v->arch.guest_table_user); crs[4] = v->arch.pv_vcpu.ctrlreg[4]; + crs[5] = v->arch.pv_vcpu.fs_base; + crs[6 + !kernel] = v->arch.pv_vcpu.gs_base_kernel; + crs[7 - !kernel] = v->arch.pv_vcpu.gs_base_user; _show_registers(regs, crs, CTXT_pv_guest, v); } @@ -237,14 +255,7 @@ void do_double_fault(struct cpu_user_reg printk("*** DOUBLE FAULT ***\n"); print_xen_info(); - crs[0] = read_cr0(); - crs[2] = read_cr2(); - crs[3] = read_cr3(); - crs[4] = read_cr4(); - regs->ds = read_sreg(ds); - regs->es = read_sreg(es); - regs->fs = read_sreg(fs); - regs->gs = read_sreg(gs); + read_registers(regs, crs); printk("CPU: %d\n", cpu); _show_registers(regs, crs, CTXT_hypervisor, NULL);