From patchwork Fri Jun 7 12:50:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 10981645 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E2E8417D2 for ; Fri, 7 Jun 2019 12:52:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D026C28BF5 for ; Fri, 7 Jun 2019 12:52:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE21328BFC; Fri, 7 Jun 2019 12:52:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6537428BF5 for ; Fri, 7 Jun 2019 12:52:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hZEJy-0004Jl-Of; Fri, 07 Jun 2019 12:50:14 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hZEJx-0004Jg-Tk for xen-devel@lists.xenproject.org; Fri, 07 Jun 2019 12:50:13 +0000 X-Inumbo-ID: c9bb3a57-8922-11e9-8980-bc764e045a96 Received: from prv1-mh.provo.novell.com (unknown [137.65.248.33]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id c9bb3a57-8922-11e9-8980-bc764e045a96; Fri, 07 Jun 2019 12:50:12 +0000 (UTC) Received: from INET-PRV1-MTA by prv1-mh.provo.novell.com with Novell_GroupWise; Fri, 07 Jun 2019 06:50:11 -0600 Message-Id: <5CFA5D8102000078002363C1@prv1-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 18.1.1 Date: Fri, 07 Jun 2019 06:50:09 -0600 From: "Jan Beulich" To: "xen-devel" Mime-Version: 1.0 Content-Disposition: inline Subject: [Xen-devel] [PATCH] x86/AMD: make use of CPUID leaf 0xb when available X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Wei Liu , Andrew Cooper , Suravee Suthikulpanit , Pu Wen , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Initially I did simply stumble across a backport of Linux commit e0ceeae708 ("x86/CPU/hygon: Fix phys_proc_id calculation logic for multi-die processors") to our kernels. There I got puzzled by the claim that a similar change isn't needed on the AMD side. As per the web page cited [1], there aren't supposed to be affected AMD processors, but according to my reading there are: The EPYC 7000 series comes with 8, 16, 24, or 32 cores, which I imply to be 1, 2, 3, or 4 die processors. And many of them have "1P/2P" in the "socket count" column. Therefore our calculation, being based on CPUID.80000008.EBX[15:12], would be similarly wrong on such 2-socket 1- or 2-die systems. Checking Linux code I then found that they don't even rely on the calculation we currently use anymore, at least not in the case when leaf 0xb is available (which is the case on Fam17). Let's follow Suravee's Linux commit 3986a0a805 ("x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available") in this regard to address this. To avoid logging duplicate information, make the function return bool. Move its and detect_ht()'s declaration to a private header at the same time. [1] https://www.amd.com/en/products/specifications/processors Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- I wonder whether Hygon code wouldn't better call detect_extended_topology() as well. --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -515,6 +515,13 @@ static void amd_get_topology(struct cpui c->cpu_core_id = ebx & 0xFF; c->x86_max_cores /= c->x86_num_siblings; } + + /* + * In case leaf B is available, use it to derive + * topology information. + */ + if (detect_extended_topology(c)) + return; } if (opt_cpu_info) --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -533,7 +533,7 @@ void identify_cpu(struct cpuinfo_x86 *c) * Check for extended topology enumeration cpuid leaf 0xb and if it * exists, use it for cpu topology detection. */ -void detect_extended_topology(struct cpuinfo_x86 *c) +bool detect_extended_topology(struct cpuinfo_x86 *c) { unsigned int eax, ebx, ecx, edx, sub_index; unsigned int ht_mask_width, core_plus_mask_width; @@ -541,13 +541,13 @@ void detect_extended_topology(struct cpu unsigned int initial_apicid; if ( c->cpuid_level < 0xb ) - return; + return false; cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx); /* Check if the cpuid leaf 0xb is actually implemented */ if ( ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE) ) - return; + return false; __set_bit(X86_FEATURE_XTOPOLOGY, c->x86_capability); @@ -588,6 +588,8 @@ void detect_extended_topology(struct cpu printk("CPU: Processor Core ID: %d\n", c->cpu_core_id); } + + return true; } void detect_ht(struct cpuinfo_x86 *c) --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -14,5 +14,8 @@ extern unsigned int opt_cpuid_mask_ext_e extern int get_model_name(struct cpuinfo_x86 *c); extern void display_cacheinfo(struct cpuinfo_x86 *c); + +extern void detect_ht(struct cpuinfo_x86 *c); +extern bool detect_extended_topology(struct cpuinfo_x86 *c); void early_init_amd(struct cpuinfo_x86 *c); --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -170,10 +170,6 @@ extern void setup_force_cpu_cap(unsigned extern void print_cpu_info(unsigned int cpu); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); -extern void detect_extended_topology(struct cpuinfo_x86 *c); - -extern void detect_ht(struct cpuinfo_x86 *c); - #define cpu_to_core(_cpu) (cpu_data[_cpu].cpu_core_id) #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id)