diff mbox series

[v2,3/8] xen/arm: revert patch related to XArray

Message ID 612c1adabc1c26a539abf0dc05ea20b51e66e85f.1606406359.git.rahul.singh@arm.com (mailing list archive)
State Superseded
Headers show
Series xen/arm: Add support for SMMUv3 driver | expand

Commit Message

Rahul Singh Nov. 26, 2020, 5:02 p.m. UTC
XArray is not implemented in XEN revert the patch that introduce the
XArray code in SMMUv3 driver.

Once XArray is implemented in XEN this patch can be added in XEN.

Reverted the commit 0299a1a81ca056e79c1a7fb751f936ec0d5c7afe

Signed-off-by: Rahul Singh <rahul.singh@arm.com>
---
 xen/drivers/passthrough/arm/smmu-v3.c | 27 +++++++++------------------
 1 file changed, 9 insertions(+), 18 deletions(-)

Comments

Stefano Stabellini Dec. 2, 2020, 12:20 a.m. UTC | #1
On Thu, 26 Nov 2020, Rahul Singh wrote:
> XArray is not implemented in XEN revert the patch that introduce the
> XArray code in SMMUv3 driver.
> 
> Once XArray is implemented in XEN this patch can be added in XEN.
> 
> Reverted the commit 0299a1a81ca056e79c1a7fb751f936ec0d5c7afe
> 
> Signed-off-by: Rahul Singh <rahul.singh@arm.com>

Acked-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
>  xen/drivers/passthrough/arm/smmu-v3.c | 27 +++++++++------------------
>  1 file changed, 9 insertions(+), 18 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
> index 97eac61ea4..cec304e51a 100644
> --- a/xen/drivers/passthrough/arm/smmu-v3.c
> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
> @@ -638,6 +638,7 @@ struct arm_smmu_device {
>  
>  #define ARM_SMMU_MAX_ASIDS		(1 << 16)
>  	unsigned int			asid_bits;
> +	DECLARE_BITMAP(asid_map, ARM_SMMU_MAX_ASIDS);
>  
>  #define ARM_SMMU_MAX_VMIDS		(1 << 16)
>  	unsigned int			vmid_bits;
> @@ -703,8 +704,6 @@ struct arm_smmu_option_prop {
>  	const char *prop;
>  };
>  
> -static DEFINE_XARRAY_ALLOC1(asid_xa);
> -
>  static struct arm_smmu_option_prop arm_smmu_options[] = {
>  	{ ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
>  	{ ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
> @@ -1366,14 +1365,6 @@ static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain)
>  	cdcfg->cdtab = NULL;
>  }
>  
> -static void arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd)
> -{
> -	if (!cd->asid)
> -		return;
> -
> -	xa_erase(&asid_xa, cd->asid);
> -}
> -
>  /* Stream table manipulation functions */
>  static void
>  arm_smmu_write_strtab_l1_desc(__le64 *dst, struct arm_smmu_strtab_l1_desc *desc)
> @@ -2006,9 +1997,10 @@ static void arm_smmu_domain_free(struct iommu_domain *domain)
>  	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
>  		struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
>  
> -		if (cfg->cdcfg.cdtab)
> +		if (cfg->cdcfg.cdtab) {
>  			arm_smmu_free_cd_tables(smmu_domain);
> -		arm_smmu_free_asid(&cfg->cd);
> +			arm_smmu_bitmap_free(smmu->asid_map, cfg->cd.asid);
> +		}
>  	} else {
>  		struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg;
>  		if (cfg->vmid)
> @@ -2023,15 +2015,14 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
>  				       struct io_pgtable_cfg *pgtbl_cfg)
>  {
>  	int ret;
> -	u32 asid;
> +	int asid;
>  	struct arm_smmu_device *smmu = smmu_domain->smmu;
>  	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
>  	typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr;
>  
> -	ret = xa_alloc(&asid_xa, &asid, &cfg->cd,
> -		       XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL);
> -	if (ret)
> -		return ret;
> +	asid = arm_smmu_bitmap_alloc(smmu->asid_map, smmu->asid_bits);
> +	if (asid < 0)
> +		return asid;
>  
>  	cfg->s1cdmax = master->ssid_bits;
>  
> @@ -2064,7 +2055,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
>  out_free_cd_tables:
>  	arm_smmu_free_cd_tables(smmu_domain);
>  out_free_asid:
> -	arm_smmu_free_asid(&cfg->cd);
> +	arm_smmu_bitmap_free(smmu->asid_map, asid);
>  	return ret;
>  }
>  
> -- 
> 2.17.1
>
Julien Grall Dec. 2, 2020, 1:46 p.m. UTC | #2
Hi Rahul,

On 26/11/2020 17:02, Rahul Singh wrote:
> XArray is not implemented in XEN revert the patch that introduce the
> XArray code in SMMUv3 driver.

Similar to the atomic revert, you are explaining why the revert but not 
the consequences. I think this is quite important to have them outline 
in the commit message as it looks like it means the SMMU driver would 
not scale.

> 
> Once XArray is implemented in XEN this patch can be added in XEN.

What's the plan for that?

Cheers,
Rahul Singh Dec. 3, 2020, 12:57 p.m. UTC | #3
Hello Julien,

> On 2 Dec 2020, at 1:46 pm, Julien Grall <julien@xen.org> wrote:
> 
> Hi Rahul,
> 
> On 26/11/2020 17:02, Rahul Singh wrote:
>> XArray is not implemented in XEN revert the patch that introduce the
>> XArray code in SMMUv3 driver.
> 
> Similar to the atomic revert, you are explaining why the revert but not the consequences. I think this is quite important to have them outline in the commit message as it looks like it means the SMMU driver would not scale.

Ok I will add.
> 
>> Once XArray is implemented in XEN this patch can be added in XEN.
> 
> What's the plan for that?

As of now there is no plan for Xarray from our side.  
Do we have requirement for Xarray implementation in XEN ?

Regards,
Rahul

> 
> Cheers,
> 
> -- 
> Julien Grall
Julien Grall Dec. 4, 2020, 8:52 a.m. UTC | #4
On 03/12/2020 12:57, Rahul Singh wrote:
> Hello Julien,

Hi,

>> On 2 Dec 2020, at 1:46 pm, Julien Grall <julien@xen.org> wrote:
>>
>> Hi Rahul,
>>
>> On 26/11/2020 17:02, Rahul Singh wrote:
>>> XArray is not implemented in XEN revert the patch that introduce the
>>> XArray code in SMMUv3 driver.
>>
>> Similar to the atomic revert, you are explaining why the revert but not the consequences. I think this is quite important to have them outline in the commit message as it looks like it means the SMMU driver would not scale.
> 
> Ok I will add.
>>
>>> Once XArray is implemented in XEN this patch can be added in XEN.
>>
>> What's the plan for that?
> 
> As of now there is no plan for Xarray from our side.
> Do we have requirement for Xarray implementation in XEN ?

That's going to depend on the consequence of reverting this patch.

Cheers,
diff mbox series

Patch

diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index 97eac61ea4..cec304e51a 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -638,6 +638,7 @@  struct arm_smmu_device {
 
 #define ARM_SMMU_MAX_ASIDS		(1 << 16)
 	unsigned int			asid_bits;
+	DECLARE_BITMAP(asid_map, ARM_SMMU_MAX_ASIDS);
 
 #define ARM_SMMU_MAX_VMIDS		(1 << 16)
 	unsigned int			vmid_bits;
@@ -703,8 +704,6 @@  struct arm_smmu_option_prop {
 	const char *prop;
 };
 
-static DEFINE_XARRAY_ALLOC1(asid_xa);
-
 static struct arm_smmu_option_prop arm_smmu_options[] = {
 	{ ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
 	{ ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
@@ -1366,14 +1365,6 @@  static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain)
 	cdcfg->cdtab = NULL;
 }
 
-static void arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd)
-{
-	if (!cd->asid)
-		return;
-
-	xa_erase(&asid_xa, cd->asid);
-}
-
 /* Stream table manipulation functions */
 static void
 arm_smmu_write_strtab_l1_desc(__le64 *dst, struct arm_smmu_strtab_l1_desc *desc)
@@ -2006,9 +1997,10 @@  static void arm_smmu_domain_free(struct iommu_domain *domain)
 	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
 
-		if (cfg->cdcfg.cdtab)
+		if (cfg->cdcfg.cdtab) {
 			arm_smmu_free_cd_tables(smmu_domain);
-		arm_smmu_free_asid(&cfg->cd);
+			arm_smmu_bitmap_free(smmu->asid_map, cfg->cd.asid);
+		}
 	} else {
 		struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg;
 		if (cfg->vmid)
@@ -2023,15 +2015,14 @@  static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
 				       struct io_pgtable_cfg *pgtbl_cfg)
 {
 	int ret;
-	u32 asid;
+	int asid;
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
 	typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr;
 
-	ret = xa_alloc(&asid_xa, &asid, &cfg->cd,
-		       XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL);
-	if (ret)
-		return ret;
+	asid = arm_smmu_bitmap_alloc(smmu->asid_map, smmu->asid_bits);
+	if (asid < 0)
+		return asid;
 
 	cfg->s1cdmax = master->ssid_bits;
 
@@ -2064,7 +2055,7 @@  static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
 out_free_cd_tables:
 	arm_smmu_free_cd_tables(smmu_domain);
 out_free_asid:
-	arm_smmu_free_asid(&cfg->cd);
+	arm_smmu_bitmap_free(smmu->asid_map, asid);
 	return ret;
 }