From patchwork Wed Jun 26 09:27:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Federico Serafini X-Patchwork-Id: 13712483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8C6DC30653 for ; Wed, 26 Jun 2024 09:28:29 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.748588.1156382 (Exim 4.92) (envelope-from ) id 1sMOwt-0005pa-7h; Wed, 26 Jun 2024 09:28:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 748588.1156382; Wed, 26 Jun 2024 09:28:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sMOws-0005pP-TI; Wed, 26 Jun 2024 09:28:18 +0000 Received: by outflank-mailman (input) for mailman id 748588; Wed, 26 Jun 2024 09:28:17 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sMOwr-0004l0-9m for xen-devel@lists.xenproject.org; Wed, 26 Jun 2024 09:28:17 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6b1b2581-339e-11ef-90a3-e314d9c70b13; Wed, 26 Jun 2024 11:28:16 +0200 (CEST) Received: from truciolo.bugseng.com (unknown [78.209.199.41]) by support.bugseng.com (Postfix) with ESMTPSA id 087084EE0738; Wed, 26 Jun 2024 11:28:15 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6b1b2581-339e-11ef-90a3-e314d9c70b13 From: Federico Serafini To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Federico Serafini , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: [XEN PATCH v3 06/12] x86/mce: address violations of MISRA C Rule 16.3 Date: Wed, 26 Jun 2024 11:27:59 +0200 Message-Id: <7c1a5865fa00b873296ba0870d620070371bcd22.1719383180.git.federico.serafini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Add missing break statements to address violations of MISRA C Rule 16.3: "An unconditional `break' statement shall terminate every switch-clause". No functional change. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/mce_amd.c | 1 + xen/arch/x86/cpu/mcheck/mce_intel.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c index 3318b8204f..4f06a3153b 100644 --- a/xen/arch/x86/cpu/mcheck/mce_amd.c +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c @@ -201,6 +201,7 @@ static void mcequirk_amd_apply(enum mcequirk_amd_flags flags) default: ASSERT(flags == MCEQUIRK_NONE); + break; } } diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index dd812f4b8a..9574dedbfd 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -896,6 +896,8 @@ static void intel_init_ppin(const struct cpuinfo_x86 *c) ppin_msr = 0; else if ( c == &boot_cpu_data ) ppin_msr = MSR_PPIN; + + break; } }