@@ -1401,6 +1401,9 @@ static void machvirt_init(MachineState *machine)
object_property_set_link(cpuobj, OBJECT(secure_sysmem),
"secure-memory", &error_abort);
}
+ if (vms->gic_version == 3) {
+ object_property_set_bool(cpuobj, true, "gicv3-sysregs", NULL);
+ }
object_property_set_bool(cpuobj, true, "realized", NULL);
object_unref(cpuobj);
@@ -1690,6 +1690,7 @@ static Property arm_cpu_properties[] = {
DEFINE_PROP_UINT64("mp-affinity", ARMCPU,
mp_affinity, ARM64_AFFINITY_INVALID),
DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID),
+ DEFINE_PROP_BOOL("gicv3-sysregs", ARMCPU, gicv3_sysregs, false),
DEFINE_PROP_END_OF_LIST()
};
@@ -657,6 +657,9 @@ struct ARMCPU {
/* Should CPU start in PSCI powered-off state? */
bool start_powered_off;
+ /* GICv3 sysregs present */
+ bool gicv3_sysregs;
+
/* Current power state, access guarded by BQL */
ARMPSCIState power_state;
@@ -4687,7 +4687,8 @@ void register_cp_regs_for_features(ARMCPU *cpu)
{ .name = "ID_AA64PFR0_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 0,
.access = PL1_R, .type = ARM_CP_CONST,
- .resetvalue = cpu->id_aa64pfr0 },
+ .resetvalue = cpu->gicv3_sysregs ? (cpu->id_aa64pfr0|0x01000000) :
+ cpu->id_aa64pfr0 },
{ .name = "ID_AA64PFR1_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 1,
.access = PL1_R, .type = ARM_CP_CONST,