diff mbox series

[1/9] xen/arm64: address violations of MISRA C:2012 Rule 11.8

Message ID b29e28544eb7772c3df633b176b9698e0ee9ae88.1702555387.git.maria.celeste.cesario@bugseng.com (mailing list archive)
State Superseded
Headers show
Series xen: address violations of MISRA C:2012 Rule 11.8 | expand

Commit Message

Simone Ballarin Dec. 14, 2023, 12:07 p.m. UTC
From: Maria Celeste Cesario <maria.celeste.cesario@bugseng.com>

The xen sources contain violations of MISRA C:2012 Rule 11.8 whose
headline states:
"A conversion shall not remove any const, volatile or _Atomic qualification
from the type pointed to by a pointer".

Add volatile qualifiers missing in casts.
Arguments p and ptr are originally volatile-qualified.
There's no reason to drop the qualifiers.
No functional change.

Signed-off-by: Maria Celeste Cesario  <maria.celeste.cesario@bugseng.com>
Signed-off-by: Simone Ballarin  <simone.ballarin@bugseng.com>
---
 xen/arch/arm/arm64/lib/bitops.c          |  6 ++++--
 xen/arch/arm/include/asm/arm64/cmpxchg.h | 10 +++++-----
 2 files changed, 9 insertions(+), 7 deletions(-)

Comments

Stefano Stabellini Dec. 14, 2023, 9:38 p.m. UTC | #1
On Thu, 14 Dec 2023, Simone Ballarin wrote:
> From: Maria Celeste Cesario <maria.celeste.cesario@bugseng.com>
> 
> The xen sources contain violations of MISRA C:2012 Rule 11.8 whose
> headline states:
> "A conversion shall not remove any const, volatile or _Atomic qualification
> from the type pointed to by a pointer".
> 
> Add volatile qualifiers missing in casts.
> Arguments p and ptr are originally volatile-qualified.
> There's no reason to drop the qualifiers.
> No functional change.
> 
> Signed-off-by: Maria Celeste Cesario  <maria.celeste.cesario@bugseng.com>
> Signed-off-by: Simone Ballarin  <simone.ballarin@bugseng.com>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


>  xen/arch/arm/arm64/lib/bitops.c          |  6 ++++--
>  xen/arch/arm/include/asm/arm64/cmpxchg.h | 10 +++++-----
>  2 files changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/xen/arch/arm/arm64/lib/bitops.c b/xen/arch/arm/arm64/lib/bitops.c
> index 20e3f3d6ce..275a780329 100644
> --- a/xen/arch/arm/arm64/lib/bitops.c
> +++ b/xen/arch/arm/arm64/lib/bitops.c
> @@ -32,7 +32,8 @@
>  static always_inline bool int_##name(int nr, volatile void *p, bool timeout,\
>                                       unsigned int max_try)                  \
>  {                                                                           \
> -    volatile uint32_t *ptr = (uint32_t *)p + BITOP_WORD((unsigned int)nr);  \
> +    volatile uint32_t *ptr = (volatile uint32_t *)p +                       \
> +                             BITOP_WORD((unsigned int)nr);                  \
>      const uint32_t mask = BITOP_MASK((unsigned int)nr);                     \
>      unsigned long res, tmp;                                                 \
>                                                                              \
> @@ -67,7 +68,8 @@ bool name##_timeout(int nr, volatile void *p, unsigned int max_try)         \
>  static always_inline bool int_##name(int nr, volatile void *p, int *oldbit, \
>                                       bool timeout, unsigned int max_try)    \
>  {                                                                           \
> -    volatile uint32_t *ptr = (uint32_t *)p + BITOP_WORD((unsigned int)nr);  \
> +    volatile uint32_t *ptr = (volatile uint32_t *)p +                       \
> +                             BITOP_WORD((unsigned int)nr);                  \
>      unsigned int bit = (unsigned int)nr % BITOP_BITS_PER_WORD;              \
>      const uint32_t mask = BITOP_MASK(bit);                                  \
>      unsigned long res, tmp;                                                 \
> diff --git a/xen/arch/arm/include/asm/arm64/cmpxchg.h b/xen/arch/arm/include/asm/arm64/cmpxchg.h
> index dbfaf91567..031fa6d92a 100644
> --- a/xen/arch/arm/include/asm/arm64/cmpxchg.h
> +++ b/xen/arch/arm/include/asm/arm64/cmpxchg.h
> @@ -13,7 +13,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
>  		"1:	ldxrb	%w0, %2\n"
>  		"	stlxrb	%w1, %w3, %2\n"
>  		"	cbnz	%w1, 1b\n"
> -			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
> +			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u8 *)ptr)
>  			: "r" (x)
>  			: "memory");
>  		break;
> @@ -22,7 +22,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
>  		"1:	ldxrh	%w0, %2\n"
>  		"	stlxrh	%w1, %w3, %2\n"
>  		"	cbnz	%w1, 1b\n"
> -			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
> +			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u16 *)ptr)
>  			: "r" (x)
>  			: "memory");
>  		break;
> @@ -31,7 +31,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
>  		"1:	ldxr	%w0, %2\n"
>  		"	stlxr	%w1, %w3, %2\n"
>  		"	cbnz	%w1, 1b\n"
> -			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
> +			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u32 *)ptr)
>  			: "r" (x)
>  			: "memory");
>  		break;
> @@ -40,7 +40,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
>  		"1:	ldxr	%0, %2\n"
>  		"	stlxr	%w1, %3, %2\n"
>  		"	cbnz	%w1, 1b\n"
> -			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
> +			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u64 *)ptr)
>  			: "r" (x)
>  			: "memory");
>  		break;
> @@ -82,7 +82,7 @@ static inline bool __cmpxchg_case_##name(volatile void *ptr,		\
>  		"	stxr" #sz "	%w0, %" #w "4, %2\n"		\
>  		"1:\n"							\
>  		: "=&r" (res), "=&r" (oldval),				\
> -		  "+Q" (*(unsigned long *)ptr)				\
> +		  "+Q" (*(volatile unsigned long *)ptr)	\
>  		: "Ir" (*old), "r" (new)				\
>  		: "cc");						\
>  									\
> -- 
> 2.40.0
>
diff mbox series

Patch

diff --git a/xen/arch/arm/arm64/lib/bitops.c b/xen/arch/arm/arm64/lib/bitops.c
index 20e3f3d6ce..275a780329 100644
--- a/xen/arch/arm/arm64/lib/bitops.c
+++ b/xen/arch/arm/arm64/lib/bitops.c
@@ -32,7 +32,8 @@ 
 static always_inline bool int_##name(int nr, volatile void *p, bool timeout,\
                                      unsigned int max_try)                  \
 {                                                                           \
-    volatile uint32_t *ptr = (uint32_t *)p + BITOP_WORD((unsigned int)nr);  \
+    volatile uint32_t *ptr = (volatile uint32_t *)p +                       \
+                             BITOP_WORD((unsigned int)nr);                  \
     const uint32_t mask = BITOP_MASK((unsigned int)nr);                     \
     unsigned long res, tmp;                                                 \
                                                                             \
@@ -67,7 +68,8 @@  bool name##_timeout(int nr, volatile void *p, unsigned int max_try)         \
 static always_inline bool int_##name(int nr, volatile void *p, int *oldbit, \
                                      bool timeout, unsigned int max_try)    \
 {                                                                           \
-    volatile uint32_t *ptr = (uint32_t *)p + BITOP_WORD((unsigned int)nr);  \
+    volatile uint32_t *ptr = (volatile uint32_t *)p +                       \
+                             BITOP_WORD((unsigned int)nr);                  \
     unsigned int bit = (unsigned int)nr % BITOP_BITS_PER_WORD;              \
     const uint32_t mask = BITOP_MASK(bit);                                  \
     unsigned long res, tmp;                                                 \
diff --git a/xen/arch/arm/include/asm/arm64/cmpxchg.h b/xen/arch/arm/include/asm/arm64/cmpxchg.h
index dbfaf91567..031fa6d92a 100644
--- a/xen/arch/arm/include/asm/arm64/cmpxchg.h
+++ b/xen/arch/arm/include/asm/arm64/cmpxchg.h
@@ -13,7 +13,7 @@  static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 		"1:	ldxrb	%w0, %2\n"
 		"	stlxrb	%w1, %w3, %2\n"
 		"	cbnz	%w1, 1b\n"
-			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u8 *)ptr)
 			: "r" (x)
 			: "memory");
 		break;
@@ -22,7 +22,7 @@  static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 		"1:	ldxrh	%w0, %2\n"
 		"	stlxrh	%w1, %w3, %2\n"
 		"	cbnz	%w1, 1b\n"
-			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u16 *)ptr)
 			: "r" (x)
 			: "memory");
 		break;
@@ -31,7 +31,7 @@  static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 		"1:	ldxr	%w0, %2\n"
 		"	stlxr	%w1, %w3, %2\n"
 		"	cbnz	%w1, 1b\n"
-			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u32 *)ptr)
 			: "r" (x)
 			: "memory");
 		break;
@@ -40,7 +40,7 @@  static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 		"1:	ldxr	%0, %2\n"
 		"	stlxr	%w1, %3, %2\n"
 		"	cbnz	%w1, 1b\n"
-			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(volatile u64 *)ptr)
 			: "r" (x)
 			: "memory");
 		break;
@@ -82,7 +82,7 @@  static inline bool __cmpxchg_case_##name(volatile void *ptr,		\
 		"	stxr" #sz "	%w0, %" #w "4, %2\n"		\
 		"1:\n"							\
 		: "=&r" (res), "=&r" (oldval),				\
-		  "+Q" (*(unsigned long *)ptr)				\
+		  "+Q" (*(volatile unsigned long *)ptr)	\
 		: "Ir" (*old), "r" (new)				\
 		: "cc");						\
 									\