@@ -34,17 +34,13 @@ static struct lvl2_pd initial_lvl2_lvl3_pd_pool[INITIAL_LVL2_LVL3_PD_COUNT];
static size_t __initdata initial_lvl4_pt_pool_used;
static struct lvl4_pt initial_lvl4_pt_pool[INITIAL_LVL4_PT_COUNT];
-/* Only reserve minimum Partition and Process tables */
#define PATB_SIZE_LOG2 16 /* Only supported partition table size on POWER9 */
#define PATB_SIZE (1UL << PATB_SIZE_LOG2)
-#define PRTB_SIZE_LOG2 12
+#define PRTB_SIZE_LOG2 24 /* Maximum process table size on POWER9 */
#define PRTB_SIZE (1UL << PRTB_SIZE_LOG2)
-static struct patb_entry
- __aligned(PATB_SIZE) initial_patb[PATB_SIZE / sizeof(struct patb_entry)];
-
-static struct prtb_entry
- __aligned(PRTB_SIZE) initial_prtb[PRTB_SIZE / sizeof(struct prtb_entry)];
+static struct patb_entry *initial_patb;
+static struct prtb_entry *initial_prtb;
static __init struct lvl1_pd *lvl1_pd_pool_alloc(void)
{
@@ -86,6 +82,62 @@ static __init struct lvl4_pt *lvl4_pt_pool_alloc(void)
return &initial_lvl4_pt_pool[initial_lvl4_pt_pool_used++];
}
+static void map_page_initial(struct lvl1_pd *lvl1, vaddr_t virt, paddr_t phys,
+ unsigned long flags)
+{
+ struct lvl2_pd *lvl2;
+ struct lvl3_pd *lvl3;
+ struct lvl4_pt *lvl4;
+ pde_t *pde;
+ pte_t *pte;
+
+ /* Allocate LVL 2 PD if necessary */
+ pde = pt_entry(lvl1, virt);
+ if ( !pde_is_valid(*pde) )
+ {
+ lvl2 = lvl2_pd_pool_alloc();
+ *pde = paddr_to_pde(__pa(lvl2), PDE_VALID,
+ XEN_PT_ENTRIES_LOG2_LVL_2);
+ }
+ else
+ lvl2 = __va(pde_to_paddr(*pde));
+
+ /* Allocate LVL 3 PD if necessary */
+ pde = pt_entry(lvl2, virt);
+ if ( !pde_is_valid(*pde) )
+ {
+ lvl3 = lvl3_pd_pool_alloc();
+ *pde = paddr_to_pde(__pa(lvl3), PDE_VALID,
+ XEN_PT_ENTRIES_LOG2_LVL_3);
+ }
+ else
+ lvl3 = __va(pde_to_paddr(*pde));
+
+ /* Allocate LVL 4 PT if necessary */
+ pde = pt_entry(lvl3, virt);
+ if ( !pde_is_valid(*pde) )
+ {
+ lvl4 = lvl4_pt_pool_alloc();
+ *pde = paddr_to_pde(__pa(lvl4), PDE_VALID,
+ XEN_PT_ENTRIES_LOG2_LVL_4);
+ }
+ else
+ lvl4 = __va(pde_to_paddr(*pde));
+
+ /* Finally, create PTE in LVL 4 PT */
+ pte = pt_entry(lvl4, virt);
+ if ( !pte_is_valid(*pte) )
+ {
+ radix_dprintk("%016lx being mapped to %016lx\n", phys, virt);
+ *pte = paddr_to_pte(phys, flags);
+ }
+ else
+ {
+ early_printk("BUG: Tried to create PTE for already-mapped page!");
+ die();
+ }
+}
+
static void __init setup_initial_mapping(struct lvl1_pd *lvl1,
vaddr_t map_start,
vaddr_t map_end,
@@ -105,80 +157,43 @@ static void __init setup_initial_mapping(struct lvl1_pd *lvl1,
die();
}
+ /* Identity map Xen itself */
for ( page_addr = map_start; page_addr < map_end; page_addr += PAGE_SIZE )
{
- struct lvl2_pd *lvl2;
- struct lvl3_pd *lvl3;
- struct lvl4_pt *lvl4;
- pde_t *pde;
- pte_t *pte;
-
- /* Allocate LVL 2 PD if necessary */
- pde = pt_entry(lvl1, page_addr);
- if ( !pde_is_valid(*pde) )
- {
- lvl2 = lvl2_pd_pool_alloc();
- *pde = paddr_to_pde(__pa(lvl2), PDE_VALID,
- XEN_PT_ENTRIES_LOG2_LVL_2);
- }
- else
- lvl2 = __va(pde_to_paddr(*pde));
+ unsigned long flags;
- /* Allocate LVL 3 PD if necessary */
- pde = pt_entry(lvl2, page_addr);
- if ( !pde_is_valid(*pde) )
+ if ( is_kernel_text(page_addr) || is_kernel_inittext(page_addr) )
{
- lvl3 = lvl3_pd_pool_alloc();
- *pde = paddr_to_pde(__pa(lvl3), PDE_VALID,
- XEN_PT_ENTRIES_LOG2_LVL_3);
+ radix_dprintk("%016lx being marked as TEXT (RX)\n", page_addr);
+ flags = PTE_XEN_RX;
}
- else
- lvl3 = __va(pde_to_paddr(*pde));
-
- /* Allocate LVL 4 PT if necessary */
- pde = pt_entry(lvl3, page_addr);
- if ( !pde_is_valid(*pde) )
- {
- lvl4 = lvl4_pt_pool_alloc();
- *pde = paddr_to_pde(__pa(lvl4), PDE_VALID,
- XEN_PT_ENTRIES_LOG2_LVL_4);
- }
- else
- lvl4 = __va(pde_to_paddr(*pde));
-
- /* Finally, create PTE in LVL 4 PT */
- pte = pt_entry(lvl4, page_addr);
- if ( !pte_is_valid(*pte) )
+ else if ( is_kernel_rodata(page_addr) )
{
- unsigned long paddr = (page_addr - map_start) + phys_base;
- unsigned long flags;
-
- radix_dprintk("%016lx being mapped to %016lx\n", paddr, page_addr);
- if ( is_kernel_text(page_addr) || is_kernel_inittext(page_addr) )
- {
- radix_dprintk("%016lx being marked as TEXT (RX)\n", page_addr);
- flags = PTE_XEN_RX;
- }
- else if ( is_kernel_rodata(page_addr) )
- {
- radix_dprintk("%016lx being marked as RODATA (RO)\n", page_addr);
- flags = PTE_XEN_RO;
- }
- else
- {
- radix_dprintk("%016lx being marked as DEFAULT (RW)\n", page_addr);
- flags = PTE_XEN_RW;
- }
-
- *pte = paddr_to_pte(paddr, flags);
- radix_dprintk("%016lx is the result of PTE map\n",
- paddr_to_pte(paddr, flags).pte);
+ radix_dprintk("%016lx being marked as RODATA (RO)\n", page_addr);
+ flags = PTE_XEN_RO;
}
else
{
- early_printk("BUG: Tried to create PTE for already-mapped page!");
- die();
+ radix_dprintk("%016lx being marked as DEFAULT (RW)\n", page_addr);
+ flags = PTE_XEN_RW;
}
+
+ map_page_initial(lvl1, page_addr, (page_addr - map_start) + phys_base, flags);
+ }
+
+ /* Map runtime-allocated PATB, PRTB */
+ for ( page_addr = (uint64_t)initial_patb;
+ page_addr < (uint64_t)initial_patb + PATB_SIZE;
+ page_addr += PAGE_SIZE )
+ {
+ map_page_initial(lvl1, page_addr, __pa(page_addr), PTE_XEN_RW);
+ }
+
+ for ( page_addr = (uint64_t)initial_prtb;
+ page_addr < (uint64_t)initial_prtb + PRTB_SIZE;
+ page_addr += PAGE_SIZE )
+ {
+ map_page_initial(lvl1, page_addr, __pa(page_addr), PTE_XEN_RW);
}
}
@@ -210,6 +225,16 @@ void __init setup_initial_pagetables(void)
{
struct lvl1_pd *root = lvl1_pd_pool_alloc();
unsigned long lpcr;
+ mfn_t patb_mfn, prtb_mfn;
+
+ /* Allocate mfns for in-memory tables using the boot allocator */
+ prtb_mfn = alloc_boot_pages(PRTB_SIZE / PAGE_SIZE,
+ max(1, PRTB_SIZE_LOG2 - PAGE_SHIFT));
+ patb_mfn = alloc_boot_pages(PATB_SIZE / PAGE_SIZE,
+ max(1, PATB_SIZE_LOG2 - PAGE_SHIFT));
+
+ initial_patb = __va(mfn_to_maddr(patb_mfn));
+ initial_prtb = __va(mfn_to_maddr(prtb_mfn));
setup_initial_mapping(root, (vaddr_t)_start, (vaddr_t)_end, __pa(_start));
In the initial mm-radix implementation, the in-memory partition and process tables required to configure the MMU were allocated statically since the boot allocator was not yet available. Now that it is, allocate these tables at runtime and bump the size of the Process Table to its maximum supported value (on POWER9). Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com> --- xen/arch/ppc/mm-radix.c | 167 +++++++++++++++++++++++----------------- 1 file changed, 96 insertions(+), 71 deletions(-)